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[X86] use vdivph for i8 integer division on avx512fp16 #215131

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[X86] use vdivph for i8 integer division on avx512fp16 #215131

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[X86] use vdivph for i8 integer division on avx512fp16
AryanBhirud Aug 9, 2026
0eed49f
[X86] Use vdivph for i8 integer division on targets with fast FP16 di…
AryanBhirud Aug 10, 2026
c0b9456
[Tests][X86] Add tests for fast FP16 vector i8 division lowering
AryanBhirud Aug 10, 2026
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4 changes: 4 additions & 0 deletions llvm/lib/Target/X86/X86.td
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Original file line number Diff line number Diff line change
Expand Up @@ -798,6 +798,10 @@ def TuningFastDPWSSD
"Prefer vpdpwssd instruction over vpmaddwd+vpaddd instruction sequence",
[], InlineIgnore>;

def TuningFastVectorFP16Div
: SubtargetFeature<"fast-vector-fp16-div", "HasFastFP16Div", "true",
"Vector FP16 division is fast",
[], InlineIgnore>;
def TuningPreferNoGather
: SubtargetFeature<"prefer-no-gather", "PreferGather", "false",
"Prefer no gather instructions",
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14 changes: 12 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Expand Up @@ -50669,7 +50669,10 @@ static SDValue combineIntDivRem(SDNode *N, SelectionDAG &DAG,

// f32 recovers the quotient exactly when both operands fit in 24 bits
MVT FPSclVT = MVT::f64;
if (EltBits <= 16 || BothFitFP(APFloat::IEEEsingle()))
if (EltBits == 8 && Subtarget.hasFastFP16Div() &&

@Andarwinux Andarwinux Aug 9, 2026

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(EltBits == 8 || BothFitFP(APFloat::IEEEhalf())) && Subtarget.hasFastFP16Div()

BothFitFP(APFloat::IEEEhalf()))
FPSclVT = MVT::f16;
else if (EltBits <= 16 || BothFitFP(APFloat::IEEEsingle()))
FPSclVT = MVT::f32;
EVT FPVT = VT.changeVectorElementType(*DAG.getContext(), FPSclVT);

Expand Down Expand Up @@ -50728,8 +50731,15 @@ static SDValue combineIntDivRem(SDNode *N, SelectionDAG &DAG,
Q = IsSigned ? DAG.getSExtOrTrunc(Q, DL, VT)
: DAG.getZExtOrTrunc(Q, DL, VT);
} else {
SDValue FPQuot = DAG.getNode(ISD::FDIV, DL, FPVT, X, Y);
unsigned FromFP = IsSigned ? ISD::FP_TO_SINT : ISD::FP_TO_UINT;
Q = DAG.getNode(FromFP, DL, VT, DAG.getNode(ISD::FDIV, DL, FPVT, X, Y));
if (FPSclVT == MVT::f16 && EltBits == 8) {
EVT I16VT = VT.changeVectorElementType(*DAG.getContext(), MVT::i16);
SDValue Q16 = DAG.getNode(FromFP, DL, I16VT, FPQuot);
Q = DAG.getNode(ISD::TRUNCATE, DL, VT, Q16);
} else {
Q = DAG.getNode(FromFP, DL, VT, FPQuot);
}
}
if (!IsRem)
return Q;
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