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Fix BramFactor co-sim and enable it for io_parallel#1505

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fastmachinelearning:mainfrom
dimdano:bramfactor_cosim
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Fix BramFactor co-sim and enable it for io_parallel#1505
dimdano wants to merge 1 commit into
fastmachinelearning:mainfrom
dimdano:bramfactor_cosim

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@dimdano

@dimdano dimdano commented Jul 15, 2026

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Description

External BRAM weights (BramFactor) failed C/RTL co-simulation, and io_parallel never emitted an interface pragma for the weight ports. Fixes #1326. See discussion #1324.

Problems

  1. Wrong co-sim output (all io_types). BRAM weights are top-level ports, so co-sim captures their values at the call boundary. hls4ml loads weights only inside the top function, so co-sim drove uninitialized (zero) arrays into the RTL. C-sim was unaffected.
  2. io_parallel had no INTERFACE bram pragma. It was only emitted for io_stream.

Type of change

  • Bug fix (non-breaking change that fixes an issue)

Tests

QKeras MLP, Vitis 2025.1, xcvu13p, matrix of io_parallel/io_stream × Resource/Latency × RF=1/8. BramFactor full + partial

interface pragma is interface-only, so synthesis (LUT/FF/DSP/BRAM/II) remained identical.

Checklist

  • I have read the guidelines for contributing.
  • I have commented my code, particularly in hard-to-understand areas.
  • I have made corresponding changes to the documentation.
  • My changes generate no new warnings.
  • I have installed and run pre-commit on the files I edited or added.
  • I have added tests that prove my fix is effective or that my feature works.

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BramFactor and co-sim

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