[WIP] Track WCH CH5xx and CH32V4x7 support by andelf · Pull Request #1 · ch32-rs/probe-rs

andelf · 2026-10-31T05:18:07Z

Purpose

Track ongoing WCH-Link, CH5xx and CH32V4x7 development on add-new-ch32-chips, targeting this fork's ch32 branch. Keep this PR as a draft while hardware validation and follow-up fixes continue.

The branch also includes upstream synchronization through f4d190285 (2026-10-22). The current comparison with ch32 contains 344 commits, so this is a development tracking PR covering both that synchronization and the WCH-specific work.

Currently implemented series

These targets have debugging support and flash algorithms in the branch. Target availability does not imply that every part or operation has been tested on hardware.

Series	Available targets	Current implementation / validation
CH56x	CH565, CH569	Debugging and CodeFlash programming support; post-attach flash-window setup command added. Hardware validation remains to be recorded here.
CH57x	CH570, CH571, CH572, CH573	Unified target definitions; CH570/CH572 retain their dedicated flash algorithm. Hardware validation remains to be recorded here.
CH58x	CH581, CH582, CH583, CH584, CH585	Debugging and CodeFlash support using the shared CH5xx algorithm. Select CH584/CH585 explicitly with `--chip`; automatic detection is not configured for these two targets. Hardware validation remains to be recorded here.
CH59x	CH591, CH592	Debugging and CodeFlash support using the shared CH5xx algorithm. Hardware validation remains to be recorded here.
CH32V4x7	CH32V407RET6/VET6/WEU6; CH32V467RET6/VET6/WEU6	Family `0xA6`, package/revision-aware detection, 200 KiB and 136 KiB RAM configurations, and generated usr/usr-legacy/sys/opt flash algorithms. CH32V467WEU6 detection and chip-ID reads are verified on hardware; flash programming and live RTT are pending.

For CH56x/CH57x/CH58x/CH59x, automatic detection depends on the WCH-Link firmware returning a usable chip ID. Use --chip when it returns zero.

Development progress

Latest hardware validation — 2026-10-31

Test setup: WCH-LinkE-CH32V305, firmware 2.22 (v42), connected to CH32V467WEU6 with chip ID 0x46740011.

The previous driver used a fixed 100 ms USB timeout. Direct protocol measurements put reconnection at approximately 115–123 ms; even the initial attachment occasionally exceeded 100 ms. This caused probe-rs info --protocol jtag to fail during the second attachment after automatic detection. AttachChip now allows one second; other commands retain their 100 ms timeout.

After installing the fix:

probe-rs info --protocol jtag succeeded in 10 consecutive runs and detected CH32V467WEU6.
Chip-ID reads at 0x1ffff704 returned 0x46740011, both with automatic detection and with --chip CH32V467WEU6.
probe-rs info --verbose --protocol jtag reported family 0xA6 and the matching chip ID.

These checks did not erase or program flash. V4x7 attachment does not opt into the automatic flash-unprotect path.

Checks

Release build and local installation of probe-rs succeeded.
cargo fmt --all -- --check passed.
cargo test -p probe-rs --lib probe::wlink --locked --release passed: 4 tests.
Changelog fragments are included for the target additions and fixes.
Full test suite and broader regression/hardware validation completed.

Co-authored-by: Cursor <cursoragent@cursor.com>

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

…be-rs#4206) Co-authored-by: Cursor <cursoragent@cursor.com>

Co-authored-by: Cursor <cursoragent@cursor.com>

…tion (probe-rs#4211) Co-authored-by: Cursor <cursoragent@cursor.com>

… `--chip-erase` always clears UICR (probe-rs#4226) Co-authored-by: Claude Fable 5 <noreply@anthropic.com>

Co-authored-by: Cursor <cursoragent@cursor.com>

Co-authored-by: renovate[bot] <29139614+renovate[bot]@users.noreply.github.com>

Co-authored-by: renovate[bot] <29139614+renovate[bot]@users.noreply.github.com> Co-authored-by: Dániel Buga <bugadani@gmail.com> Co-authored-by: Claude Sonnet 5.5 <noreply@anthropic.com>

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

…e-rs#4478) Co-authored-by: Paulius Zaleckas <paulius.zaleckas@gmail.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

…cted (probe-rs#4513) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Co-authored-by: OnlyoutzZ <17393117531@163.com> Co-authored-by: nsingcommunity <nsingcommunity@nsingtech.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Co-authored-by: Dániel Buga <bugadani@gmail.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Add the CH585 chip family code (0x4B) to the WCH-Link `RiscvChip` table, so `AttachChip` no longer fails with `Unknown chip 0x4b` on these parts. Add a target description for CH585 and CH584. Both expose 448 KiB of code flash at 0x0; the 32 KiB data flash at 0x70000 is deliberately left out of the memory map because it is reached through the ISP library rather than the code address space. SRAM is 128 KiB on the CH585 and 96 KiB on the CH584. No flash algorithm is included, so these targets support debugging and memory access but not flashing yet. Verified on a CH585 with a WCH-LinkE: `info --verbose` reports family 0x4b, and `read`/`reset` work with `--chip CH585`. Co-Authored-By: Claude Code <noreply@anthropic.com>

Replace `CH585_Series.yaml` with `CH57X_Series.yaml`, `CH58X_Series.yaml`, and `CH59X_Series.yaml` covering WCH's QingKe V4A/V4C BLE MCU families: - `CH57X_Series.yaml`: CH571 (192 KiB Flash / 18 KiB RAM), CH573 (448 KiB Flash / 18 KiB RAM) - `CH58X_Series.yaml`: CH581, CH582, CH583, CH584, CH585 (448 KiB Flash / 32..128 KiB RAM) - `CH59X_Series.yaml`: CH591 (192 KiB Flash / 26 KiB RAM), CH592 (448 KiB Flash / 26 KiB RAM) All three families share a single 1024-byte position-independent CodeFlash algorithm (`ch32-rs/flash-algorithms` `ch5xx`) that dynamically enforces the per-chip CodeFlash ceiling via `R8_CHIP_ID` (`0x40001041`) and runs at each target's default RAM start (`0x20003800` on CH571/573, `0x20000000` on CH58x/CH59x). Co-Authored-By: Claude Code <noreply@anthropic.com>

…CH592_Series.yaml Avoid colliding with Cortex-M0 CH577/CH578/CH579 (`CH57X`) and CH595 (`CH59X`, which uses a different hardware pre-program/page-latch Flash controller at `0x40001800..0x40001820`), matching the existing `CH570_CH572_Series.yaml` naming convention. Co-Authored-By: Claude Code <noreply@anthropic.com>

List CH581, CH582, CH583, CH584, and CH585 explicitly instead of using a `CH58X` wildcard, since CH586/CH587 have different memory sizes (up to 960 KiB CodeFlash / 256 KiB SRAM) and a separate WCH-Link chip code (`0xAB`). Co-Authored-By: Claude Code <noreply@anthropic.com>

….yaml Use `CH58X_Series.yaml` (`CH58X Series`) to cover CH581, CH582, CH583, CH584, and CH585. Co-Authored-By: Claude Code <noreply@anthropic.com>

…H591/592 Each variant's `CodeFlash` `!Nvm` region already bounds its flash size (and the algorithm checks `R8_CHIP_ID` at runtime), so `ch5xx-code-flash-192k` and `ch5xx-code-flash-448k` can be collapsed into a single `ch5xx-code-flash` entry matching `target-gen`'s `compact_flash_algos` behavior. Co-Authored-By: Claude Code <noreply@anthropic.com>

Fold `CH570_CH572_Series.yaml` into `CH57X_CH58X_CH59X_Series.yaml` and drop the per-family files. CH570/CH572 switch from `ch570-code-flash` to the shared position-independent `ch5xx-code-flash`, which already caps those chip ids (`0x70`/`0x72`) at 240 KiB via `R8_CHIP_ID`. Co-Authored-By: Claude Code <noreply@anthropic.com>

CH570 and CH572 go back to `ch570-code-flash` unchanged, instead of the shared `ch5xx-code-flash`. Drop the `0x93000000` detection entry: the probe firmware reports chip id 0 for that part, so it never matches. Co-Authored-By: Claude Code <noreply@anthropic.com>

Add a target description for the WCH CH565/CH569 series (QingKe V3A, 448 KiB CodeFlash at 0x0) with the `ch569-code-flash` algorithm from `algos-ch5xx/ch569` in ch32-rs/flash-algorithms. The algorithm erases in 4 KiB sectors and implements `ReadFlash`, because a halted debug read of CodeFlash returns a placeholder instead of the stored bytes. The WCH-Link needs the `0x0d/0x04` post-attach setup that wlink sends for the CH56X family; without it, flash accesses fail with an abstract command exception. Verified on a CH569 with a WCH-LinkE: `download --verify` of a 256-byte image completes in under two seconds. Co-Authored-By: Claude Code <noreply@anthropic.com>

Keep the changelog entries to user-visible support, and drop the implementation notes above the CH565/CH569 algorithm's load address. Co-Authored-By: Claude Code <noreply@anthropic.com>

erase_all now erases aligned 64 KiB blocks with 0xD8 and the tail with 0x20, matching the vendor loader. The blob is rebuilt from ch32-rs/flash-algorithms algos-ch5xx/ch5xx.

Only autoexecdata is used by the program-buffer memory paths. Some debug modules, such as WCH QingKe, implement data-register autoexec but ignore the progbuf bits, so the previous equality check disabled autoexec and fell back to one abstract command per word.

Recognise WCH-Link family 0xA6 as the QingKe-V4F CH32V4X7 series and add the CH32V4X7 Series target with six parts. The RAM split is driven by USER.RAM_CODE_MOD (bit 6), giving either 200 KiB or 136 KiB, and each variant carries usr/usr-legacy/sys/opt flash algorithms. Flash protection is deliberately not enabled for V4x7, so attaching does not trigger the automatic unprotect path. Flashing, RTT and the flash algorithms have not been validated on hardware yet.

github-actions · 2026-10-31T05:18:40Z

Please do not edit CHANGELOG.md directly. Take a look at CONTRIBUTING.md for information on changelog fragments instead.

bugadani and others added 30 commits July 31, 2026 20:23

Optimize ESP USB JTAG (probe-rs#4198)

465510a

Co-authored-by: Cursor <cursoragent@cursor.com>

FTDI driver optimisation (probe-rs#4199)

6c13163

Co-authored-by: Cursor <cursoragent@cursor.com>

Use abstractauto for RISC-V program buffer writes (probe-rs#4200)

9dfcedf

Co-authored-by: Cursor <cursoragent@cursor.com>

defmt_decoder parse error is now warning only (probe-rs#4201)

9144af5

fix(debug): read enum values held in a register (probe-rs#4082)

7d416d7

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

Replace the duplicate --reset flag with download --start (probe-rs#4204)

ccc6b01

Move the probe-rs domain conversions out of the RPC wire modules (pro…

844c28c

…be-rs#4206) Co-authored-by: Cursor <cursoragent@cursor.com>

Move the CLI oriented wire types into the RPC module (probe-rs#4207)

44775e4

Co-authored-by: Cursor <cursoragent@cursor.com>

Remove the target registry from the RPC client (probe-rs#4208)

78b04a9

Co-authored-by: Cursor <cursoragent@cursor.com>

Return a typed error from the RPC client (probe-rs#4209)

93e905a

Co-authored-by: Cursor <cursoragent@cursor.com>

Add the probe-rs-rpc crate (probe-rs#4210)

afbf14e

Co-authored-by: Cursor <cursoragent@cursor.com>

Add the probe-rs-rpc-client crate and prepare both crates for publica…

aeb39fe

…tion (probe-rs#4211) Co-authored-by: Cursor <cursoragent@cursor.com>

Fix a DAP server CLI bug (probe-rs#4215)

4a2dbbc

fix - rtt down channel silently discarding bytes (probe-rs#4214)

4f36ede

Add initial WCH CH570 and CH572 debugging support (probe-rs#4217)

bdf1586

Queue attach requests (probe-rs#4216)

2a723d2

Add CH570 and CH572 flashing support (probe-rs#4219)

bb2c7d5

Support remote via ssh:// (probe-rs#4218)

0a26405

Speed up CH570 and CH572 flashing (probe-rs#4220)

16140a3

nRF53/nRF91: implement debug_erase_sequence via CTRL-AP ERASEALL so…

36129fb

… `--chip-erase` always clears UICR (probe-rs#4226) Co-authored-by: Claude Fable 5 <noreply@anthropic.com>

RAM download progress (probe-rs#4205)

89e4c32

Add skip_reset_on_ram_boot to the target YAMLs (probe-rs#3778)

96f3217

Rpc updates (probe-rs#4229)

758ec40

Co-authored-by: Cursor <cursoragent@cursor.com>

Rebuild gdb server and cargo-embed over RPC (probe-rs#4230)

8d548ad

Co-authored-by: Cursor <cursoragent@cursor.com>

Fix cargo embed performance (probe-rs#4231)

f605782

add ASR6601 Series MCU support (probe-rs#4227)

b169f8d

ASR6601 keep jtag enabled in sleep / standby (probe-rs#4232)

141fa9c

fix(nrf53): reset application core through CTRL-AP (probe-rs#4168)

c1a6fd8

fix(nrf53): restore network access across app resets (probe-rs#4233)

31b37d7

Update Rust crate object to 0.40 (probe-rs#4236)

8c82e90

Co-authored-by: renovate[bot] <29139614+renovate[bot]@users.noreply.github.com>

SeanLyonsTI and others added 29 commits October 20, 2026 05:52

Fix missing scfg on cc27xx device (probe-rs#4502)

a9cd2c4

Update Rust crate bitfield to v0.20.0 (probe-rs#4498)

cd181be

Co-authored-by: renovate[bot] <29139614+renovate[bot]@users.noreply.github.com> Co-authored-by: Dániel Buga <bugadani@gmail.com> Co-authored-by: Claude Sonnet 5.5 <noreply@anthropic.com>

Fix reset cc23xx cc27xx part 2 (probe-rs#4508)

f309e15

Update rustls-webpki and webpki roots (probe-rs#4509)

2dbf41b

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

riscv: use 2nd EBREAK as return address for flash algo (probe-rs#4510)

fcef251

Only look for a RAM vector table on ARM targets (probe-rs#4511)

d6aa661

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Add driver settings and reset_line_connected to the probe table (prob…

c1d3a22

…e-rs#4478) Co-authored-by: Paulius Zaleckas <paulius.zaleckas@gmail.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

AM261: initialize TCM ECC before loading (probe-rs#4492)

41b5605

Use the WCH-Link RST pin if reset_line_connected is true (probe-rs#4512)

0ad7110

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Make probe drivers block reset asserts if the reset line is not conne…

1d5f5f2

…cted (probe-rs#4513) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Add NSING N32H7xx series support (cleaned up) (probe-rs#4514)

29e7577

Co-authored-by: OnlyoutzZ <17393117531@163.com> Co-authored-by: nsingcommunity <nsingcommunity@nsingtech.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Fixed probe-rs debug -c <command> hang bug (probe-rs#4457)

58f47b1

Co-authored-by: Dániel Buga <bugadani@gmail.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Set usb_location for ST-Link probes (probe-rs#4516)

d88fb03

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Run CMSIS-DAP ARM register accesses in the probe firmware (probe-rs#4505

95e6b43

) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Use the shared selector matching in ST-Link and FTDI (probe-rs#4517)

f4d1902

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>

Rename CH581_CH582_CH583_CH584_CH585_Series.yaml back to CH58X_Series…

ca6080a

….yaml Use `CH58X_Series.yaml` (`CH58X Series`) to cover CH581, CH582, CH583, CH584, and CH585. Co-Authored-By: Claude Code <noreply@anthropic.com>

Address CH5xx review feedback

9ee691a

Keep the changelog entries to user-visible support, and drop the implementation notes above the CH565/CH569 algorithm's load address. Co-Authored-By: Claude Code <noreply@anthropic.com>

Update the CH5xx flash algorithm for 64 KiB erase

c525aeb

erase_all now erases aligned 64 KiB blocks with 0xD8 and the tail with 0x20, matching the vendor loader. The blob is rebuilt from ch32-rs/flash-algorithms algos-ch5xx/ch5xx.

Fix WCH-Link attach timeout for CH32V4x7

54ed25f

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[WIP] Track WCH CH5xx and CH32V4x7 support - #1

[WIP] Track WCH CH5xx and CH32V4x7 support#1
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andelf commented Oct 31, 2026

Purpose

Currently implemented series

Development progress

Latest hardware validation — 2026-10-31

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