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[AMDGPU][MC] Fix a crash when invalid SDWA encoding is used #215140

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[AMDGPU][MC] Fix a crash when invalid SDWA encoding is used #215140

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23 changes: 23 additions & 0 deletions llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -453,6 +453,29 @@ DECODE_SDWA(Src32)
DECODE_SDWA(Src16)
DECODE_SDWA(VopcDst)

// The 3-bit SDWA sel fields only define values up to DWORD; 7 is reserved.
static DecodeStatus decodeSDWASel(MCInst &Inst, unsigned Imm,
uint64_t /* Addr */,
const MCDisassembler * /* Decoder */) {
using namespace AMDGPU::SDWA;

if (Imm > SdwaSel::DWORD)

@arsenm arsenm Aug 9, 2026

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Seems like this kind of check should have been autogenerated

@shiltian shiltian Aug 9, 2026

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I thought about that, but I don't have any better idea off the top of my mind. Any suggestions?

@shiltian shiltian Aug 9, 2026 •
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I can only think about doing some macro to avoid some duplication if that's what you want.

return MCDisassembler::Fail;
return addOperand(Inst, MCOperand::createImm(Imm));
}

// The 2-bit SDWA dst_unused field only defines values up to UNUSED_PRESERVE;
// 3 is reserved.
static DecodeStatus decodeSDWADstUnused(MCInst &Inst, unsigned Imm,
uint64_t /* Addr */,
const MCDisassembler * /* Decoder */) {
using namespace AMDGPU::SDWA;

if (Imm > DstUnused::UNUSED_PRESERVE)
return MCDisassembler::Fail;
return addOperand(Inst, MCOperand::createImm(Imm));
}

static DecodeStatus decodeVersionImm(MCInst &Inst, unsigned Imm,
uint64_t /* Addr */,
const MCDisassembler *Decoder) {
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5 changes: 4 additions & 1 deletion llvm/lib/Target/AMDGPU/SIInstrInfo.td
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Expand Up @@ -1247,6 +1247,7 @@ class SDWAOperand<string Id, string Name = NAME>
let ParserMethod =
"[this](OperandVector &Operands) -> ParseStatus { "#
"return parseSDWASel(Operands, \""#Id#"\", AMDGPUOperand::"#ImmTy#"); }";
let DecoderMethod = "decodeSDWASel";
}

class ArrayOperand0<string Id, string Name = NAME>
Expand Down Expand Up @@ -1312,7 +1313,9 @@ def Dim : CustomOperand</*optional=*/1, type=i8>;
def dst_sel : SDWAOperand<"dst_sel", "SDWADstSel">;
def src0_sel : SDWAOperand<"src0_sel", "SDWASrc0Sel">;
def src1_sel : SDWAOperand<"src1_sel", "SDWASrc1Sel">;
def dst_unused : CustomOperand<1, "SDWADstUnused">;
def dst_unused : CustomOperand<1, "SDWADstUnused"> {
let DecoderMethod = "decodeSDWADstUnused";
}

def op_sel0 : ArrayOperand0<"op_sel", "OpSel">;
def op_sel_hi0 : ArrayOperand0<"op_sel_hi", "OpSelHi">;
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14 changes: 14 additions & 0 deletions llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
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Expand Up @@ -61,6 +61,20 @@
# GFX1250-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0xfc,0x0e,0x80,0xbe

# These are v_add_f32_sdwa with a reserved value in one of the SDWA fields:
# 7 in a 3-bit sel field and 3 in the 2-bit dst_unused field.
# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0xf9,0x04,0x00,0x02,0x01,0x07,0x06,0x06

# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0xf9,0x04,0x00,0x02,0x01,0x1e,0x06,0x06

# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0xf9,0x04,0x00,0x02,0x01,0x06,0x07,0x06

# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0xf9,0x04,0x00,0x02,0x01,0x06,0x06,0x07

# W32: v_dual_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 0xaf123456 ; encoding: [0xff,0x04,0x02,0xc9,0x03,0x03,0x06,0x05,0x56,0x34,0x12,0xaf]
# W64: [[@LINE+1]]:1: warning: invalid instruction encoding
0xff,0x04,0x02,0xc9,0x03,0x03,0x06,0x05,0x56,0x34,0x12,0xaf
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