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RuntimeLibcalls: Add sincos to the RISCV runtime libcall set #215115

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arsenm merged 2 commits into from
Aug 11, 2026
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RuntimeLibcalls: Add sincos to the RISCV runtime libcall set #215115

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RuntimeLibcalls: Add sincos to the RISCV runtime libcall set
arsenm Aug 9, 2026
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arsenm Aug 10, 2026
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1 change: 1 addition & 0 deletions llvm/include/llvm/IR/RuntimeLibcalls.td
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Original file line number Diff line number Diff line change
Expand Up @@ -3185,6 +3185,7 @@ def RISCVSystemLibrary
: SystemRuntimeLibrary<isRISCV,
(add DefaultRuntimeLibcallImpls,
exp10f, exp10, exp10l_f128,
LibmHasSinCosF32, LibmHasSinCosF64, LibmHasSinCosF128,

@nemanjai nemanjai Aug 10, 2026

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Just out of curiosity - if these are generally available on all targets, why not just get rid of the predicates?

@arsenm arsenm Aug 10, 2026

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It's available on all targets, with glibc not any libc

__riscv_flush_icache,
LibcallImpls<(add Int128RTLibcalls), isRISCV64>,
DefaultStackProtector,
Expand Down
136 changes: 136 additions & 0 deletions llvm/test/CodeGen/RISCV/llvm.sincos.ll
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@@ -0,0 +1,136 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=riscv64-linux-gnu -mattr=+d < %s | FileCheck %s --check-prefix=RV64
; RUN: llc -mtriple=riscv32-linux-gnu -mattr=+d < %s | FileCheck %s --check-prefix=RV32

; Test the llvm.sincos intrinsic lowering to the sincos libcalls, which glibc
; provides (sincosf/sincos/sincosl). RISCV long double is fp128, so f128 uses
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; sincosl.

define { float, float } @test_sincos_f32(float %a) nounwind {
; RV64-LABEL: test_sincos_f32:
; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -16
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-NEXT: addi a0, sp, 4
; RV64-NEXT: mv a1, sp
; RV64-NEXT: call sincosf
; RV64-NEXT: flw fa0, 4(sp)
; RV64-NEXT: flw fa1, 0(sp)
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 16
; RV64-NEXT: ret
;
; RV32-LABEL: test_sincos_f32:
; RV32: # %bb.0:
; RV32-NEXT: addi sp, sp, -16
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-NEXT: addi a0, sp, 8
; RV32-NEXT: addi a1, sp, 4
; RV32-NEXT: call sincosf
; RV32-NEXT: flw fa0, 8(sp)
; RV32-NEXT: flw fa1, 4(sp)
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret
%result = call { float, float } @llvm.sincos.f32(float %a)
ret { float, float } %result
}

define { double, double } @test_sincos_f64(double %a) nounwind {
; RV64-LABEL: test_sincos_f64:
; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -32
; RV64-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64-NEXT: addi a0, sp, 16
; RV64-NEXT: addi a1, sp, 8
; RV64-NEXT: call sincos
; RV64-NEXT: fld fa0, 16(sp)
; RV64-NEXT: fld fa1, 8(sp)
; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 32
; RV64-NEXT: ret
;
; RV32-LABEL: test_sincos_f64:
; RV32: # %bb.0:
; RV32-NEXT: addi sp, sp, -32
; RV32-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32-NEXT: addi a0, sp, 16
; RV32-NEXT: addi a1, sp, 8
; RV32-NEXT: call sincos
; RV32-NEXT: fld fa0, 16(sp)
; RV32-NEXT: fld fa1, 8(sp)
; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 32
; RV32-NEXT: ret
%result = call { double, double } @llvm.sincos.f64(double %a)
ret { double, double } %result
}

define { fp128, fp128 } @test_sincos_f128(fp128 %a) nounwind {
; RV64-LABEL: test_sincos_f128:
; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -48
; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
; RV64-NEXT: mv a4, a2
; RV64-NEXT: mv s0, a0
; RV64-NEXT: addi a2, sp, 16
; RV64-NEXT: mv a3, sp
; RV64-NEXT: mv a0, a1
; RV64-NEXT: mv a1, a4
; RV64-NEXT: call sincosl
; RV64-NEXT: ld a0, 16(sp)
; RV64-NEXT: ld a1, 24(sp)
; RV64-NEXT: ld a2, 0(sp)
; RV64-NEXT: ld a3, 8(sp)
; RV64-NEXT: sd a0, 0(s0)
; RV64-NEXT: sd a1, 8(s0)
; RV64-NEXT: sd a2, 16(s0)
; RV64-NEXT: sd a3, 24(s0)
; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 48
; RV64-NEXT: ret
;
; RV32-LABEL: test_sincos_f128:
; RV32: # %bb.0:
; RV32-NEXT: addi sp, sp, -80
; RV32-NEXT: sw ra, 76(sp) # 4-byte Folded Spill
; RV32-NEXT: sw s0, 72(sp) # 4-byte Folded Spill
; RV32-NEXT: lw a4, 0(a1)
; RV32-NEXT: lw a5, 4(a1)
; RV32-NEXT: lw a6, 8(a1)
; RV32-NEXT: lw a7, 12(a1)
; RV32-NEXT: mv s0, a0
; RV32-NEXT: addi a0, sp, 24
; RV32-NEXT: addi a1, sp, 8
; RV32-NEXT: addi a2, sp, 56
; RV32-NEXT: addi a3, sp, 40
; RV32-NEXT: sw a4, 8(sp)
; RV32-NEXT: sw a5, 12(sp)
; RV32-NEXT: sw a6, 16(sp)
; RV32-NEXT: sw a7, 20(sp)
; RV32-NEXT: call sincosl
; RV32-NEXT: lw a0, 40(sp)
; RV32-NEXT: lw a1, 44(sp)
; RV32-NEXT: lw a2, 48(sp)
; RV32-NEXT: lw a3, 52(sp)
; RV32-NEXT: lw a4, 56(sp)
; RV32-NEXT: lw a5, 60(sp)
; RV32-NEXT: lw a6, 64(sp)
; RV32-NEXT: lw a7, 68(sp)
; RV32-NEXT: sw a0, 16(s0)
; RV32-NEXT: sw a1, 20(s0)
; RV32-NEXT: sw a2, 24(s0)
; RV32-NEXT: sw a3, 28(s0)
; RV32-NEXT: sw a4, 0(s0)
; RV32-NEXT: sw a5, 4(s0)
; RV32-NEXT: sw a6, 8(s0)
; RV32-NEXT: sw a7, 12(s0)
; RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 72(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 80
; RV32-NEXT: ret
%result = call { fp128, fp128 } @llvm.sincos.f128(fp128 %a)
ret { fp128, fp128 } %result
}
40 changes: 16 additions & 24 deletions llvm/test/CodeGen/RISCV/sincos-expansion.ll
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Expand Up @@ -7,20 +7,16 @@
define float @test_sincos_f32(float %f) nounwind {
; CHECK-LABEL: test_sincos_f32:
; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
; CHECK-NEXT: fmv.s fs0, fa0
; CHECK-NEXT: call sinf
; CHECK-NEXT: fmv.s fs1, fa0
; CHECK-NEXT: fmv.s fa0, fs0
; CHECK-NEXT: call cosf
; CHECK-NEXT: fadd.s fa0, fs1, fa0
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi a0, sp, 4
; CHECK-NEXT: mv a1, sp
; CHECK-NEXT: call sincosf
; CHECK-NEXT: flw fa5, 0(sp)
; CHECK-NEXT: flw fa4, 4(sp)
; CHECK-NEXT: fadd.s fa0, fa4, fa5
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 16
; CHECK-NEXT: ret
%sin = call float @sinf(float %f) readnone
%cos = call float @cosf(float %f) readnone
Expand Down Expand Up @@ -57,17 +53,13 @@ define double @test_sincos_f64(double %f) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
; CHECK-NEXT: fmv.d fs0, fa0
; CHECK-NEXT: call sin
; CHECK-NEXT: fmv.d fs1, fa0
; CHECK-NEXT: fmv.d fa0, fs0
; CHECK-NEXT: call cos
; CHECK-NEXT: fadd.d fa0, fs1, fa0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: addi a1, sp, 8
; CHECK-NEXT: call sincos
; CHECK-NEXT: fld fa5, 8(sp)
; CHECK-NEXT: fld fa4, 16(sp)
; CHECK-NEXT: fadd.d fa0, fa4, fa5
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret
%sin = call double @sin(double %f) readnone
Expand Down
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