Softmax update#1494
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| params['type'] = node.get_attr('activation') | ||
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| if (params['type'] == 'softmax') or (params['type'] == 'softmax_multidim'): | ||
| params.setdefault('n_inner', 1) |
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These options have a default value, so there's no reason to set it here. See the default value in fpga_backend.py
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| if 'exp_table_size' not in params: | ||
| params['exp_table_size'] = 2 ** params['inp_norm_t'].precision.width | ||
| node.set_attr('exp_table_size', params['exp_table_size']) |
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I would not make the default different for oneAPI vs Vitis/Vivado. Note that the setting there is:
params.setdefault('exp_table_size', params['table_size']). I am worried that this is too big of a default if, for example, we have a width of 18 bits.
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One could argue for a different default, but let's not diverge.
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I would suggest just copying https://github.com/fastmachinelearning/hls4ml/blob/main/hls4ml/backends/vivado/passes/core_templates.py#L298-L309 for the default setting
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Changed this to use the default size of 1024 bits, but I would suggest something around 4096, perhaps, since at 1e-3 tolerance, I get around 60% of the values wrong. This is with a non-quantised layer too, since we don't have defined exp_table and inv_table sizes for a non-quantised layer, we default to 1024, leading to very coarse table values.
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| else: | ||
| # TODO: For latency check the table sizes correctly, match them | ||
| if 'exp_table_size' not in params: |
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This is re-implementing set_default.
| template <class data_pipe, class res_pipe, typename CONFIG_T> void softmax_legacy_stream() { | ||
| #include "activation_tables/exp_table_legacy.tb" | ||
| #include "activation_tables/invert_table_legacy.tb" | ||
| //#include "activation_tables/exp_table_legacy.tb" |
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I would suggest removing the commented out includes that are just historic.
| def __write_exp_table(self, model, path): | ||
| table_name = 'exp_table' | ||
| table_size = self.__get_table_size(model, 'softmax') | ||
| def __get_table_precision(self, model, activation, table_name='table_precision'): |
| fp_bits = 16 | ||
| fp_integer = 6 | ||
| fp_signed = True | ||
| def __write_exp_table(self, model, path): |
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Minor comment, feel free to ignore, but would it be useful for this to have a _stable suffix. Also, would the name be better if it was made plural, write_exp_tables_stable (and similar for the other ones) since this now can write out multiple tables.
| real_val = f.exp_float() | ||
| h_file.write(sep + str(real_val)) | ||
| sep = ', ' | ||
| # Default fixed point precision |
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There is no need for default here.
| h_file.close() | ||
| # Exp table should use the same precision as exp_table, as seen in Vivado code | ||
| # init_exp_table<data_T, CONFIG_T>(exp_table); | ||
| for layer in model.get_layers(): |
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Why loop again for layers here within the loop for layers on line 824? This looks like a bug.
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| h_file.write('};\n') | ||
| h_file.close() | ||
| # Exp table should use the same precision as exp_table, as seen in Vivado code |
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I don't understand the comment, that the exp table should use the same precision as exp table. Isn't that true inherently?
| sep = ', ' | ||
| # Default fixed point precision, in case values from layer attributes cannot be extracted | ||
| # 8 bits for integer part, 10 bits for decimal - total, 18 | ||
| fp_bits = 18 |
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Again I don't think you need defaults here.
| h_file.close() | ||
| # Invert table should use the same precision as exp_table, as seen in Vivado code | ||
| # init_invert_table<typename CONFIG_T::exp_table_t, CONFIG_T>(invert_table); | ||
| for layer in model.get_layers(): |
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And again a layer loop inside of a layer loop.
Description
The softmax table generation logic was updated. The implementation for writing the softmax tables was revised, and memory attributes were added to enable a more efficient FPGA compilation flow. In addition, the templates were modified to use weights directly from the configuration.
The primary motivation for these changes was to bring the oneAPI backend closer to the Vivado backend in terms of implementation.
Memory attributes were added to enable memory banking on the FPGA, allowing for more efficient memory access. The weights are now copied directly into the configuration so that the compiler can recognise the entire table as a set of fixed values. This enables the memory to be implemented more efficiently, resulting in improved resource utilisation during FPGA compilation.
N/A
Type of change
For a new feature or function, please create an issue first to discuss it
with us before submitting a pull request.
Note: Please delete options that are not relevant.
Tests
The changes were primarily verified using black-box tests on an isolated softmax unit. Testing was performed for both quantised and non-quantised implementations. For the quantised version, both configurations, with and without exp and inv table quantisers (QuantiserConfig(...)), were tested.
Additional testing included:
This PR currently supports only the Intel oneAPI compiler. Support for the Altera HLS compiler will be added in a future PR.
The implementation was also evaluated with different table sizes, and the resulting RTL reports were inspected to verify improvements in resource utilisation.
A Python test file and a Keras model containing only a single softmax layer (Softmax or QSoftmax) were used. For the quantised implementation, the input and output quantisers for the exp and inv lookup tables were configured using QuantiserConfig(...). Tests were run with both the quantisers enabled and disabled.
The test configuration included:
Test Configuration:
Checklist
pre-commiton the files I edited or added.