Verilog: fix three type-checker gaps from LogikBench triage - #2052

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kroening/logikbench-typecheck-gaps

Commits on Jul 23, 2026

Verilog: restore genvar values when elaborating instance connections

kroening
and
claude
committed
05f1b58
Verilog: implicit nets for concatenation members on continuous-assign LHS

kroening
and
claude
committed
bd7e12c
Verilog: give the integer type a concrete width in width queries

kroening
and
claude
committed
4354d46