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WIP: sdhci-dwc: adsp-sc598: consume emmc_timer_cmq clock #3487

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WIP: sdhci-dwc: adsp-sc598: consume emmc_timer_cmq clock #3487

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7 changes: 4 additions & 3 deletions arch/arm64/boot/dts/adi/sc59x-64.dtsi
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Original file line number Diff line number Diff line change
@@ -1,3 +1,3 @@
/*
* Copyright (c) 2021 Analog Devices Incorporated
* Author: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Expand Down Expand Up @@ -659,12 +659,13 @@


mmc0: mmc@310c7000 {
compatible = "snps,dwcmshc-sdhci";
compatible = "adi,adsp-sc598-dwcmshc", "snps,dwcmshc-sdhci";

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checkpatch: DT compatible string "adi,adsp-sc598-dwcmshc" appears un-documented -- check ./Documentation/devicetree/bindings/
+			compatible = "adi,adsp-sc598-dwcmshc", "snps,dwcmshc-sdhci";
reg = <0x310c7000 0x1000>;
interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>; /* Status */
/*<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;*/ /* Wakeup */
clocks = <&clk ADSP_SC598_CLK_EMMC>;
clock-names = "core";
clocks = <&clk ADSP_SC598_CLK_EMMC>,
<&clk ADSP_SC598_CLK_EMMC_TIMER_QMC>;
clock-names = "core", "timer";
bus-width = <8>;
status = "disabled";
};
Expand Down
22 changes: 22 additions & 0 deletions drivers/mmc/host/sdhci-of-dwcmshc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1031,7 +1031,7 @@
cv18xx_sdhci_post_tuning(host);

/* use average delay to get the best timing */
avg = (target_min + target_max) / 2;

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GitHub Actions / build_gcc_aarch64_sc598-som-ezkit_defconfig / build 

gcc_fanalayzer: use of uninitialized value ‘target_max’ [CWE-457] [-Wanalyzer-use-of-uninitialized-value]
1034 | avg = (target_min + target_max) / 2;
| ~~~~~~~~~~~~^~~~~~~~~~~~~
‘cv18xx_sdhci_execute_tuning’: events 1-3
|
| 989 | static int cv18xx_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
| | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (1) entry to ‘cv18xx_sdhci_execute_tuning’
|......
| 992 | int win_length, target_min, target_max, target_win_length;
| | ~~~~~~~~~~
| | |
| | (2) region created on stack here
| | (3) capacity: 4 bytes
|
‘cv18xx_sdhci_execute_tuning’: event 4
|
| 999 | while (max < CV18XX_TUNE_MAX) {
| | ^
| | |
| | (4) following ‘true’ branch (when ‘max <= 127’)...
|
‘cv18xx_sdhci_execute_tuning’: event 5
|
|cc1:
| (5): ...to here
|
‘cv18xx_sdhci_execute_tuning’: events 6-8
|
| 1001 | while (min < CV18XX_TUNE_MAX) {
| | ^
| | |
| | (6) following ‘true’ branch (when ‘min <= 127’)...
| 1002 | cv18xx_sdhci_set_tap(host, min);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (7) ...to here
| 1003 | if (!cv18xx_retry_tuning(host->mmc, opcode, NULL))
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (8) calling ‘cv18xx_retry_tuning’ from ‘cv18xx_sdhci_execute_tuning’
|
+--> ‘cv18xx_retry_tuning’: event 9
|
| 964 | static int cv18xx_retry_tuning(struct mmc_host *mmc, u32 opcode, int *cmd_error)
| | ^~~~~~~~~~~~~~~~~~~
| | |
| | (9) entry to ‘cv18xx_retry_tuning’
|
‘cv18xx_retry_tuning’: events 10-11
|
| 968 | while (retry < CV18XX_RETRY_TUNING_MAX) {
| | ^
| | |
| | (10) following ‘true’ branch (when ‘retry != 50’)...
| 969 | ret = mmc_send_tuning(mmc, opcode, NULL);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (11) ...to here
|
<------+
|
‘cv18xx_sdhci_execute_tuning’: events 12-13
|
| 1003 | if (!cv18xx_retry_tuning(host->mmc, opcode, NULL))
| | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (12) returning to ‘cv18xx_sdhci_execute_tuning’ from ‘cv18xx_retry_tuning’
|......
| 1021 | if (win_length > target_win_length) {
| | ~
| | |
| | (13) following ‘false’ branch (when ‘target_win_length >= win_length’)...
|
‘cv18xx_sdhci_execute_tuning’: events 14-15
|
| 1028 | min = max + CV18XX_TUNE_STEP;
| | ^
| | |
| | (14) ...to here
|......
| 1031 | cv18xx_sdhci_post_tuning(host);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (15) calling ‘cv18xx_sdhci_post_tuning’ from ‘cv18xx_sdhci_execute_tuning’
|
+--> ‘cv18xx_sdhci_post_tuning’: events 16-17
|
| 978 | static void cv18xx_sdhci_post_tuning(struct sdhci_host *host)
| | ^~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (16) entry to ‘cv18xx_sdhci_post_tuning’
|......
| 986 | dwcmshc_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (17) calling ‘dwcmshc_reset’ from ‘cv18xx_sdhci_post_tuning’
|
+--> ‘dwcmshc_reset’: events 18-20
|
| 292 | static void dwcmshc_reset(struct sdhci_host *host, u8 mask)
| | ^~~~~~~~~~~~~
| | |
| | (18) entry to ‘dwcmshc_reset’
|......
| 301 | if (mask & SDHCI_RESET_CMD)
| | ~
| | |
| | (19) following ‘true’ branch...
| 302 | sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS);
| | ~
| | |
| | (20) inlined call to ‘sdhci_writel’ from ‘dwcmshc_reset’
|
+--> ‘sdhci_writel’: event 21
|
|/home/runner/_work/linux/linux/include/asm-generic/io.h:287:16:
| 287 | #define writel writel
| | ^~~~~~
| | |
| | (21) inlined call to ‘writel’ from ‘sdhci_writel’

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GitHub Actions / build_gcc_aarch64_sc598-som-ezkit_defconfig / build 

gcc_fanalayzer: use of uninitialized value ‘target_min’ [CWE-457] [-Wanalyzer-use-of-uninitialized-value]
1034 | avg = (target_min + target_max) / 2;
| ~~~~~~~~~~~~^~~~~~~~~~~~~
‘cv18xx_sdhci_execute_tuning’: events 1-3
|
| 989 | static int cv18xx_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
| | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (1) entry to ‘cv18xx_sdhci_execute_tuning’
|......
| 992 | int win_length, target_min, target_max, target_win_length;
| | ~~~~~~~~~~
| | |
| | (2) region created on stack here
| | (3) capacity: 4 bytes
|
‘cv18xx_sdhci_execute_tuning’: event 4
|
| 999 | while (max < CV18XX_TUNE_MAX) {
| | ^
| | |
| | (4) following ‘true’ branch (when ‘max <= 127’)...
|
‘cv18xx_sdhci_execute_tuning’: event 5
|
|cc1:
| (5): ...to here
|
‘cv18xx_sdhci_execute_tuning’: events 6-8
|
| 1001 | while (min < CV18XX_TUNE_MAX) {
| | ^
| | |
| | (6) following ‘true’ branch (when ‘min <= 127’)...
| 1002 | cv18xx_sdhci_set_tap(host, min);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (7) ...to here
| 1003 | if (!cv18xx_retry_tuning(host->mmc, opcode, NULL))
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (8) calling ‘cv18xx_retry_tuning’ from ‘cv18xx_sdhci_execute_tuning’
|
+--> ‘cv18xx_retry_tuning’: event 9
|
| 964 | static int cv18xx_retry_tuning(struct mmc_host *mmc, u32 opcode, int *cmd_error)
| | ^~~~~~~~~~~~~~~~~~~
| | |
| | (9) entry to ‘cv18xx_retry_tuning’
|
‘cv18xx_retry_tuning’: events 10-11
|
| 968 | while (retry < CV18XX_RETRY_TUNING_MAX) {
| | ^
| | |
| | (10) following ‘true’ branch (when ‘retry != 50’)...
| 969 | ret = mmc_send_tuning(mmc, opcode, NULL);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (11) ...to here
|
<------+
|
‘cv18xx_sdhci_execute_tuning’: events 12-13
|
| 1003 | if (!cv18xx_retry_tuning(host->mmc, opcode, NULL))
| | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (12) returning to ‘cv18xx_sdhci_execute_tuning’ from ‘cv18xx_retry_tuning’
|......
| 1021 | if (win_length > target_win_length) {
| | ~
| | |
| | (13) following ‘false’ branch (when ‘target_win_length >= win_length’)...
|
‘cv18xx_sdhci_execute_tuning’: events 14-15
|
| 1028 | min = max + CV18XX_TUNE_STEP;
| | ^
| | |
| | (14) ...to here
|......
| 1031 | cv18xx_sdhci_post_tuning(host);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (15) calling ‘cv18xx_sdhci_post_tuning’ from ‘cv18xx_sdhci_execute_tuning’
|
+--> ‘cv18xx_sdhci_post_tuning’: events 16-17
|
| 978 | static void cv18xx_sdhci_post_tuning(struct sdhci_host *host)
| | ^~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (16) entry to ‘cv18xx_sdhci_post_tuning’
|......
| 986 | dwcmshc_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
| | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | (17) calling ‘dwcmshc_reset’ from ‘cv18xx_sdhci_post_tuning’
|
+--> ‘dwcmshc_reset’: events 18-20
|
| 292 | static void dwcmshc_reset(struct sdhci_host *host, u8 mask)
| | ^~~~~~~~~~~~~
| | |
| | (18) entry to ‘dwcmshc_reset’
|......
| 301 | if (mask & SDHCI_RESET_CMD)
| | ~
| | |
| | (19) following ‘true’ branch...
| 302 | sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS);
| | ~
| | |
| | (20) inlined call to ‘sdhci_writel’ from ‘dwcmshc_reset’
|
+--> ‘sdhci_writel’: event 21
|
|/home/runner/_work/linux/linux/include/asm-generic/io.h:287:16:
| 287 | #define writel writel
| | ^~~~~~
| | |
| | (21) inlined call to ‘writel’ from ‘sdhci_writel’
cv18xx_sdhci_set_tap(host, avg);
ret = mmc_send_tuning(host->mmc, opcode, NULL);

Expand Down Expand Up @@ -1120,6 +1120,15 @@
ARRAY_SIZE(clk_ids), clk_ids);
}

static int dwcmshc_adsp_sc598_init(struct device *dev, struct sdhci_host *host,
struct dwcmshc_priv *dwc_priv)
{
static const char * const clk_ids[] = {"timer"};

return dwcmshc_get_enable_other_clks(mmc_dev(host->mmc), dwc_priv,
ARRAY_SIZE(clk_ids), clk_ids);
}

static const struct sdhci_ops sdhci_dwcmshc_ops = {
.set_clock = sdhci_set_clock,
.set_bus_width = sdhci_set_bus_width,
Expand Down Expand Up @@ -1202,6 +1211,15 @@
},
};

static const struct dwcmshc_pltfm_data sdhci_dwcmshc_adsp_sc598_pdata = {
.pdata = {
.ops = &sdhci_dwcmshc_ops,
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
},
.init = dwcmshc_adsp_sc598_init,
};

#ifdef CONFIG_ACPI
static const struct dwcmshc_pltfm_data sdhci_dwcmshc_bf3_pdata = {
.pdata = {
Expand Down Expand Up @@ -1343,6 +1361,10 @@
.compatible = "rockchip,rk3568-dwcmshc",
.data = &sdhci_dwcmshc_rk35xx_pdata,
},
{
.compatible = "adi,adsp-sc598-dwcmshc",

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checkpatch: DT compatible string "adi,adsp-sc598-dwcmshc" appears un-documented -- check ./Documentation/devicetree/bindings/
+		.compatible = "adi,adsp-sc598-dwcmshc",
.data = &sdhci_dwcmshc_adsp_sc598_pdata,
},
{
.compatible = "snps,dwcmshc-sdhci",
.data = &sdhci_dwcmshc_pdata,
Expand Down
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