Issues

• Missing Vector Execution Unit

  XUANTIE-RV/openc910#76 · Filter by author ojaskudari opened on Sep 23, 2026

• [LSU] Store Queue newest metadata aliases different pages with the same offset

  XUANTIE-RV/openc910#73 · Filter by author YzhDDDing opened on Sep 6, 2026

• [LSU] Redirect-killed Load Queue entries remain visible and train the no-speculation predictor

  XUANTIE-RV/openc910#72 · Filter by author YzhDDDing opened on Sep 6, 2026

• hpcp: explicit CSR write to minstret does not cancel the in-flight retire increment

  XUANTIE-RV/openc910#69 · Filter by author areddyTT opened on Aug 18, 2026
  1

• [Bug] corner case bug in Vfdsu floating point DivSqrt

  XUANTIE-RV/openc910#67 · Filter by author ashraf629 opened on Aug 3, 2026

• mtval is written on delegated traps handled in S-mode, which Priv 1.10 forbids ("otherwise, mtval is never written by the implementation")

  XUANTIE-RV/openc910#66 · Filter by author dreamqin68 opened on Jul 31, 2026
  1

• [MMU/iuTLB] Aborted instruction-fetch walk still reports its access fault, faulting an unrelated PC

  XUANTIE-RV/openc910#65 · Filter by author anamdev-TT opened on Jul 31, 2026

• [MMU/iuTLB] M-mode bypass PA corrupted by concurrent iuTLB hit - pa/pgs/flg terms are OR'd, not muxed

  XUANTIE-RV/openc910#64 · Filter by author anamdev-TT opened on Jul 31, 2026

• satp write with an unsupported MODE still updates ASID and PPN (Priv 1.10 requires the entire write to have no effect)

  XUANTIE-RV/openc910#63 · Filter by author dreamqin68 opened on Jul 31, 2026
  1

• mip.SSIP and mip.STIP OR in an external CLINT source, so Priv 1.10's acknowledge cannot clear them

  XUANTIE-RV/openc910#62 · Filter by author dreamqin68 opened on Jul 30, 2026
  1

• PMP-denied load can hang instead of raising a load access fault

  XUANTIE-RV/openc910#61 · Filter by author jimmymtest opened on Jun 24, 2026

• [Bug] 2KB PMP regions are enforced inconsistently in TOR mode

  XUANTIE-RV/openc910#60 · Filter by author KnightGOKU opened on Jun 23, 2026

• OpenC910: PMP-denied addressed cache operations complete while ordinary loads fault

  XUANTIE-RV/openc910#59 · Filter by author KnightGOKU opened on Jun 23, 2026

• Cache-index reads can recover data after locked PMP blocks normal loads

  XUANTIE-RV/openc910#58 · Filter by author jimmymtest opened on Jun 23, 2026

• Page-table walks use the original access type instead of a PMP read check

  XUANTIE-RV/openc910#57 · Filter by author jimmymtest opened on Jun 23, 2026

• OpenC910: Reserved W-only PMP permissions are preserved on readback

  XUANTIE-RV/openc910#56 · Filter by author KnightGOKU opened on Jun 23, 2026

• OpenC910: Higher-priority locked PMP NA4 deny entries are bypassed by lower-priority NAPOT allow entries

  XUANTIE-RV/openc910#55 · Filter by author KnightGOKU opened on Jun 22, 2026

• Using a loop control variable in two different procedural blocks causes potential race condition

  XUANTIE-RV/openc910#52 · Filter by author x-Aksara-x opened on Apr 29, 2026

• Question: is TH1520/Meles silicon derived from this openc910 RTL, and what is the RAS-miss/underflow fetch behavior?

  XUANTIE-RV/openc910#50 · Filter by author Phobia-Cosmos opened on Mar 30, 2026
  1

• Deadcode in FSM

  XUANTIE-RV/openc910#49 · Filter by author likeamahoney opened on Feb 6, 2026

• Deadcode in ct_lsu_snoop_snq_entry.v RTL model file

  XUANTIE-RV/openc910#48 · Filter by author likeamahoney opened on May 19, 2025

• Constant-time violations for div[u][w] and rem[u][w]

  XUANTIE-RV/openc910#47 · Filter by author TobiasKovats opened on Apr 13, 2025

• The testbentch code problem

  XUANTIE-RV/openc910#46 · Filter by author kangjian888 opened on Mar 27, 2025
  1

• Deadcode in ct_mmu_jtlb.v

  XUANTIE-RV/openc910#45 · Filter by author likeamahoney opened on Mar 20, 2025

• Clarification on number of cores considered for Verilator simulation

  XUANTIE-RV/openc910#43 · Filter by author yswntht opened on Feb 5, 2025