MT6589 DRM and Blade panels

Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml

@@ -23,6 +23,7 @@ properties:
           - enum:
               - mediatek,mt2701-mmsys
               - mediatek,mt2712-mmsys
+              - mediatek,mt6589-dispsys
               - mediatek,mt6765-mmsys
               - mediatek,mt6779-mmsys
               - mediatek,mt6795-mmsys

Documentation/devicetree/bindings/clock/mediatek,syscon.yaml

@@ -28,7 +28,6 @@ properties:
               - mediatek,mt2712-mfgcfg
               - mediatek,mt2712-vdecsys
               - mediatek,mt2712-vencsys
-              - mediatek,mt6589-dispsys
               - mediatek,mt6589-imgsys
               - mediatek,mt6589-mfgsys
               - mediatek,mt6589-vdecsys

Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml

@@ -24,6 +24,7 @@ properties:
     oneOf:
       - enum:
           - mediatek,mt2701-disp-color
+          - mediatek,mt6589-disp-color
           - mediatek,mt8167-disp-color
           - mediatek,mt8173-disp-color
           - mediatek,mt8195-mdp3-color

Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml

@@ -24,6 +24,7 @@ properties:
     oneOf:
       - enum:
           - mediatek,mt2701-dsi
+          - mediatek,mt6589-dsi
           - mediatek,mt7623-dsi
           - mediatek,mt8167-dsi
           - mediatek,mt8173-dsi

Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml

@@ -23,6 +23,7 @@ properties:
     oneOf:
       - enum:
           - mediatek,mt2701-disp-ovl
+          - mediatek,mt6589-disp-ovl
           - mediatek,mt8167-disp-ovl
           - mediatek,mt8173-disp-ovl
           - mediatek,mt8183-disp-ovl

Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml

@@ -25,6 +25,7 @@ properties:
     oneOf:
       - enum:
           - mediatek,mt2701-disp-rdma
+          - mediatek,mt6589-disp-rdma
           - mediatek,mt8173-disp-rdma
           - mediatek,mt8183-disp-rdma
           - mediatek,mt8195-disp-rdma

Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml

@@ -31,8 +31,12 @@ properties:
 
         # AU Optronics Corporation 8.0" WUXGA TFT LCD panel
       - auo,b080uan01
+        # BOE Technology 10.1" WXGA panel with Himax HX8896-A01 TCON
+      - boe,hx8896-a01-panel
         # Boe Corporation 8.0" WUXGA TFT LCD panel
       - boe,tv080wum-nl0
+        # CMI 10.1" WXGA panel with Himax HX8896-A01 TCON
+      - innolux,hx8896-a01-panel
         # Innolux P079ZCA 7.85" 768x1024 TFT LCD panel
       - innolux,p079zca
         # JDI FHD_R63452 1080x1920 5.2" IPS LCD Panel

Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml

@@ -72,6 +72,7 @@ properties:
       - enum:
           - mediatek,mt2701-m4u  # generation one
           - mediatek,mt2712-m4u  # generation two
+          - mediatek,mt6589-m4u  # generation one (dual core)
           - mediatek,mt6779-m4u  # generation two
           - mediatek,mt6795-m4u  # generation two
           - mediatek,mt6893-iommu-mm         # generation two
@@ -97,10 +98,20 @@ properties:
           - const: mediatek,mt2701-m4u
 
   reg:
-    maxItems: 1
+    minItems: 1
+    maxItems: 4  # MT6589 needs 4 regions (global, m4u0, m4u1, l2cache)
+
+  reg-names:
+    minItems: 1
+    maxItems: 4
 
   interrupts:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2  # MT6589 has one IRQ per core
+
+  interrupt-names:
+    minItems: 1
+    maxItems: 2
 
   clocks:
     items:
@@ -133,6 +144,7 @@ properties:
       dt-binding/memory/mediatek,mt8188-memory-port.h for mt8188,
       dt-binding/memory/mediatek,mt8189-memory-port.h for mt8189,
       dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,
+      dt-binding/memory/mt6589-larb-port.h for mt6589,
       dt-binding/memory/mt2712-larb-port.h for mt2712,
       dt-binding/memory/mt6779-larb-port.h for mt6779,
       dt-binding/memory/mt6795-larb-port.h for mt6795,
@@ -155,13 +167,50 @@ required:
   - '#iommu-cells'
 
 allOf:
+  - if:
+      properties:
+        compatible:
+          not:
+            contains:
+              const: mediatek,mt6589-m4u
+    then:
+      properties:
+        reg:
+          maxItems: 1
+        interrupts:
+          maxItems: 1
+      required:
+        - reg
+    else:
+      properties:
+        reg:
+          minItems: 4
+          maxItems: 4
+        interrupts:
+          minItems: 2
+          maxItems: 2
+        reg-names:
+          items:
+            - const: global
+            - const: m4u0
+            - const: m4u1
+            - const: l2cache
+        interrupt-names:
+          items:
+            - const: m4u0
+            - const: m4u1
+      required:
+        - reg-names
+        - interrupt-names
+
   - if:
       properties:
         compatible:
           contains:
             enum:
               - mediatek,mt2701-m4u
               - mediatek,mt2712-m4u
+              - mediatek,mt6589-m4u
               - mediatek,mt6795-m4u
               - mediatek,mt6893-iommu-mm
               - mediatek,mt8173-m4u
@@ -240,3 +289,23 @@ examples:
                              <&larb3>, <&larb4>, <&larb5>;
             #iommu-cells = <1>;
     };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    iommu@10208000 {
+        compatible = "mediatek,mt6589-m4u";
+        reg = <0x10205000 0x200>,
+              <0x10205200 0x600>,
+              <0x10205800 0x600>,
+              <0x10205100 0x100>;
+        reg-names = "global", "m4u0", "m4u1", "l2cache";
+        interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>,
+                     <GIC_SPI 142 IRQ_TYPE_LEVEL_LOW>;
+        interrupt-names = "m4u0", "m4u1";
+        clocks = <&infracfg CLK_INFRA_M4U>;
+        clock-names = "bclk";
+        mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
+                         <&larb3>, <&larb4>, <&larb5>;
+        #iommu-cells = <1>;
+    };

Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml

@@ -31,6 +31,7 @@ properties:
       - enum:
           - mediatek,mt2701-smi-common
           - mediatek,mt2712-smi-common
+          - mediatek,mt6589-smi-common
           - mediatek,mt6779-smi-common
           - mediatek,mt6795-smi-common
           - mediatek,mt6893-smi-common
@@ -51,9 +52,6 @@ properties:
           - const: mediatek,mt7623-smi-common
           - const: mediatek,mt2701-smi-common
 
-  reg:
-    maxItems: 1
-
   power-domains:
     maxItems: 1
 
@@ -86,6 +84,24 @@ required:
   - clock-names
 
 allOf:
+  - if:  # Generation 0 HW (mt6589)
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt6589-smi-common
+    then:
+      properties:
+        reg:
+          items:
+            - description: SMI AO base
+            - description: SMI base
+          minItems: 2
+          maxItems: 2
+    else:
+      properties:
+        reg:
+          maxItems: 1
+
   - if:  # only for gen1 HW
       properties:
         compatible:

Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml

@@ -19,6 +19,7 @@ properties:
       - enum:
           - mediatek,mt2701-smi-larb
           - mediatek,mt2712-smi-larb
+          - mediatek,mt6589-smi-larb
           - mediatek,mt6779-smi-larb
           - mediatek,mt6795-smi-larb
           - mediatek,mt6893-smi-larb

Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml

@@ -37,6 +37,7 @@ properties:
               - mediatek,mt8365-mipi-tx
           - const: mediatek,mt8183-mipi-tx
       - const: mediatek,mt2701-mipi-tx
+      - const: mediatek,mt6589-mipi-tx
       - const: mediatek,mt8173-mipi-tx
       - const: mediatek,mt8183-mipi-tx
 

Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml

@@ -17,6 +17,7 @@ properties:
     oneOf:
       - enum:
           - mediatek,mt2701-disp-pwm
+          - mediatek,mt6589-disp-pwm
           - mediatek,mt6595-disp-pwm
           - mediatek,mt8173-disp-pwm
           - mediatek,mt8183-disp-pwm

Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml

@@ -26,6 +26,7 @@ properties:
     enum:
       - mediatek,mt2701-disp-mutex
       - mediatek,mt2712-disp-mutex
+      - mediatek,mt6589-disp-mutex
       - mediatek,mt6795-disp-mutex
       - mediatek,mt8167-disp-mutex
       - mediatek,mt8173-disp-mutex

arch/arm/boot/dts/mediatek/mt6589-lenovo-b8000.dtsi

@@ -13,5 +13,60 @@
 		height = <800>;
 		stride = <(1280 * 2)>;
 		format = "r5g6b5";
+		status = "disabled";
+	};
+};
+
+&pio {
+	panel_pins: panel-pins {
+		pins_power_en {
+			pinmux = <MT6589_GPIO137__FUNC_GPIO137>;
+		};
+	};
+};
+
+&mt6320_ldo_vrf28_2 {
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+};
+
+&dsi {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	panel@0 {
+		compatible = "boe,hx8896-a01-panel";
+		reg = <0>;
+		power-supply = <&mt6320_ldo_vrf28_2>;
+		enable-gpios = <&pio 137 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&panel_pins>;
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&dsi_out>;
+			};
+		};
+	};
+
+	/*
+	panel@0 {
+		compatible = "innolux,hx8896-a01";
+		reg = <0>;
+		power-supply = <&mt6320_ldo_vrf28_2>;
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&dsi_out>;
+			};
+		};
+	};
+	*/
+
+	port {
+		dsi_out: endpoint {
+			remote-endpoint = <&panel_in>;
+		};
 	};
 };

arch/arm/boot/dts/mediatek/mt6589-lenovo-blade.dtsi

@@ -457,3 +457,7 @@
 &pwm {
 	status = "okay";
 };
+
+&bls {
+	status = "okay";
+};