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The esp32c5_upload pre-action rewrote a 0x0 bootloader offset to 0x2000 in UPLOADERFLAGS before upload. It is dead code on both framework paths: - Arduino: the framework package's tools/pioarduino-build.py generates FLASH_EXTRA_IMAGES with bootloader offsets 0x1000 (esp32/s2), 0x2000 (esp32p4/esp32c5), 0x0 (others), so esp32c5 already uploads at 0x2000. - ESP-IDF: builder/frameworks/espidf.py resolves the offset through the upload.bootloader_offset board manifest key with the same esp32c5/esp32p4 = 0x2000 default matrix. Verified on seeed-xiao-esp32-c5 (Arduino): build succeeds and an envdump of UPLOADERFLAGS shows bootloader.bin at 0x2000 with the pre-action removed. No hardware upload was performed. Co-Authored-By: Claude <noreply@anthropic.com>
Port of d466200 (from the FamilyConfig line, which this tree does not carry) back to the function form: remove the type=uploader pruning loop entirely. samd's own uploaders carry no type field, so the loop collected and deleted esp/renesas/nrf uploaders from the shared packages dict, breaking later in-process configuration of those families; the deleted packages are optional and never install for samd builds anyway. Also drops two stray debug prints. Co-Authored-By: Claude <noreply@anthropic.com>
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dev is reset to main's tree; only the version floor moves to 1.1.2 (above the published 1.1.1 tag, per check-dev-version). The #119 FamilyConfig rework is superseded by #121 (families/ registry + upstream integration); its one real bug fix travels in #122. Co-Authored-By: Claude <noreply@anthropic.com>
The gpio-all-pins-cdc example still mapped D8 to PA15 (the BAT_EN net); the board dtsi and the xiao-stm32c5-test-plan sample fixed this to PE2 (schematic D8 net) but the example was never updated. Port the fix. The board re-spin renamed the PB14 header net and silkscreen from D15 to D18. The example now displays D18 and accepts both d18 and d15 commands (matched before the generic dN path, since bare numeric 18 is BOOT0); board-file comments follow the rename. The connector gpio-map index stays 15 for API compatibility. Co-Authored-By: Claude <noreply@anthropic.com>
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Two small fixes, rebased onto the main baseline (the previous dev-only history is dropped; see #121 for the architecture that supersedes it):
Drop the dead esp32c5_upload pre-action — the bootloader offset 0x2000 is already generated by the framework package's offset matrix (esp32c5/esp32p4 = 0x2000) and the espidf builder's upload.bootloader_offset board key. Verified via envdump on seeed-xiao-esp32-c5.
Stop samd deleting other families' uploader packages (port of d466200 to the function form) — samd's uploader pruning loop deleted esp/renesas/nrf uploaders from the shared packages dict because samd's own uploaders carry no type field. The packages are optional and never install for samd builds; the loop bought nothing and broke later in-process cross-family configuration.
Found in review during #121.
stm32: GPIO example D8 pad fix + D15→D18 net rename follow-up (15715f9)
Fix
zephyr-gpio-all-pins-cdcD8 pad mapping: PA15 → PE2 — the example still drove PA15 (the BAT_EN net) as "D8"; the board dtsi and thexiao-stm32c5-test-plansample fixed this to PE2 (schematic D8 net) but the example copy was never updated, so CI-built firmware tested the wrong pad.Follow the board re-spin that renamed the PB14 header net and silkscreen D15 → D18:
D18, accepts bothd18andd15commands (matched before the genericdNpath, since bare numeric18is BOOT0), so scripts for either board revision keep working.seeed_xiao_connector.dtsi/xiao_stm32c5.dtscomments updated; the connector gpio-map index stays 15 for API compatibility.