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Simplify bit primitive and barrier scenario benches - #288
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Final candidate Both full-domain source proofs, 22 rejected mutations, all six focused module/system/four-state gates, eight source-stage records and twenty matching traces per example are verified. The independent reviewer additionally checked 272 gate input hashes and execution receipts. Current generated module receipts, catalog links and README costs are bound to this candidate. No API/compiler/Runtime/DUT/cycle/timeout changes. Bit native runtime is approximately unchanged with its outlier disclosed; barrier native warm median improves about 22%. Full nightly/platform validation, arbitrary injected X/Z phase equivalence and actual u64 rollover execution remain unclaimed. Raw evidence and independent reviews remain local ignored artifacts. |
Replace expanded stimulus/control expressions in the bit-primitive and barrier system benches with immutable typed tables using the existing language. Bit primitive shrinks from 6,003 to 472 lines; barrier from 5,318 to 435 lines. No compiler, Runtime, public API, DUT, oracle, cycle or timeout changes.
The two counter contracts remain distinct. Bit primitive preserves the existing helper signature, advance/system bodies, 344-cycle history and hold-above-343 behavior. Its table has 344 active rows plus an all-zero fallback for known helper inputs 344–65535. Barrier keeps 347 rows, full-u64 clamp and wrap, explicit nominal tokens, and its four-one tail from phase 345. Assertions and registration order remain unchanged in both examples. Refresh the guides, verified module receipts and navigation.
Validation:
Same-machine LLVM 22 /
-O0measurements show bit-primitive bench compilation 5.58→3.25s, with native warm median 3.200→3.185s approximately unchanged; one candidate runtime outlier of 4.462 s is disclosed. Barrier compilation 5.37→2.21s and native warm median 2.362→1.853s improve, while RTL runtime is approximately unchanged. Runtime medians use three alternating paired warm runs; build/emission phases have one observation each. Both final IR and generated-output sizes decrease. Each README records the full table and limits.Full catalog/nightly/platform matrices, arbitrary injected X/Z phase equivalence and actual u64 rollover execution are not claimed. Remaining migration and scaling work stays in #272/#265. Intermediate experiments, proof tools, reviews and candidate-bound raw evidence remain ignored under
docs/gates/logs/pipeline-benches-20261010/; tests do not depend on those files.