SAFARI Research Group at ETH Zurich and Carnegie Mellon University
- 907 followers
- ETH Zurich and Carnegie Mellon University
- https://safari.ethz.ch/
- omutlu@gmail.com
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Repositories
- Hermes Public
A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical path, as described by MICRO 2022 paper by Bera et al. (https://arxiv.org/pdf/2209.00188.pdf)
CMU-SAFARI/Hermes’s past year of commit activity - Harmonia Public
Harmonia: Enhancing Data Placement and Migration in Hybrid Storage Systems via Multi-Agent Reinforcement Learning
CMU-SAFARI/Harmonia’s past year of commit activity - ramulator2 Public
Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and evaluation of new memory system designs (e.g., new DRAM standards, emerging RowHammer mitigation techniques). Described in our IEEE CAL 2023 paper: https://arxiv.org/pdf/2308.11030.
CMU-SAFARI/ramulator2’s past year of commit activity - SiMRA-PUF Public
SiMRA-PUF is a DRAM-based PUF that uses simultaneous multiple-row activation to generate PUF responses in off-the-shelf DRAM chips. Described in the DSN Disrupt 2026 paper: https://arxiv.org/abs/2606.15470
CMU-SAFARI/SiMRA-PUF’s past year of commit activity - ColumnKeeper Public
ColumnKeeper is the first set of mitigation mechanisms for the ColumnDisturb DRAM vulnerability. Described in the ISCA 2026 paper: https://arxiv.org/abs/2606.22632
CMU-SAFARI/ColumnKeeper’s past year of commit activity - Argus Public
CMU-SAFARI/Argus’s past year of commit activity - DejaVu Public
Artifact for the ISCA'26 paper "DejaVu: Why You Should Write to Your DRAM Rows Twice, Carefully." Described in https://arxiv.org/abs/2606.22297
CMU-SAFARI/DejaVu’s past year of commit activity - ScaleDisturb Public
ScaleDisturb is a new DRAM access pattern that can amplify DRAM read disturbance by asymmetrically extending the open time of two aggressor rows. This repository provides the artifact for the DSN'26 paper "ScaleDisturb: Exploiting Temporal Asymmetry to Amplify Read Disturbance in Modern DRAM Chips." Described in https://arxiv.org/abs/2606.07761
CMU-SAFARI/ScaleDisturb’s past year of commit activity - DPC4 Public
The GitHub repository containing all resources used in the 4th Data Prefetching Championship (DPC4), co-located with HPCA 2026.
CMU-SAFARI/DPC4’s past year of commit activity - prim-benchmarks Public
PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is developed to evaluate, analyze, and characterize the first publicly-available real-world PIM architecture, the UPMEM PIM architecture. Described by Gómez-Luna et al. (https://arxiv.org/abs/2105.03814).
CMU-SAFARI/prim-benchmarks’s past year of commit activity
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