control.sch

v 20130925 2
C 40000 40000 0 0 0 title-C.sym
C 42700 52300 1 90 0 EMBEDDEDresistor-2.sym
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C 43500 51300 1 90 0 EMBEDDEDresistor-2.sym
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C 48200 52100 1 90 0 EMBEDDEDresistor-2.sym
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C 48000 53900 1 270 0 EMBEDDEDresistor-2.sym
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C 47000 54100 1 0 0 EMBEDDEDcoil-1.sym
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C 48900 52900 1 0 0 EMBEDDEDgnd-1.sym
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C 45200 54700 1 0 0 EMBEDDEDcapacitor-1.sym
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N 47000 54100 46400 54100 4
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C 47300 52300 1 180 0 EMBEDDEDcapacitor-1.sym
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C 47200 50900 1 0 0 EMBEDDEDgnd-1.sym
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C 47100 53200 1 90 0 EMBEDDEDdiode-2.sym
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C 43300 51400 1 0 0 EMBEDDEDmp1584.sym
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C 46700 53100 1 0 0 EMBEDDEDgnd-1.sym
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C 49200 54100 1 90 1 EMBEDDEDcapacitor-2.sym
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L 49000 53400 49000 53600 3 0 0 0 -1 -1
L 49000 53700 49000 53900 3 0 0 0 -1 -1
A 49000 52900 700 75 30 3 0 0 0 -1 -1
L 48800 53811 48900 53811 3 0 0 0 -1 -1
L 48851 53760 48851 53860 3 0 0 0 -1 -1
T 48500 53900 5 10 0 0 90 6 1
device=POLARIZED_CAPACITOR
T 48700 53900 8 10 0 1 90 6 1
refdes=C?
T 47900 53900 5 10 0 0 90 6 1
description=polarized capacitor
T 48100 53900 5 10 0 0 90 6 1
numslots=0
T 48300 53900 5 10 0 0 90 6 1
symversion=0.1
]
{
T 48500 53900 5 10 0 0 90 6 1
device=POLARIZED_CAPACITOR
T 48600 54300 5 10 1 1 180 6 1
refdes=C2
T 48300 53900 5 10 0 0 90 6 1
symversion=0.1
T 49200 54100 5 10 1 1 0 0 1
value=100uF/6.3v
T 49200 54100 5 10 0 0 0 0 1
footprint=EIA3528
}
C 49300 46900 1 0 0 EMBEDDEDATmega8-au.sym
[
P 52500 49000 52200 49000 1 0 0
{
T 52300 49050 5 8 1 1 0 0 1
pinnumber=29
T 52300 49150 5 8 0 1 0 2 1
pinseq=29
T 52150 49000 9 8 1 1 0 6 1
pinlabel=(RESET) PC6
T 52150 49000 5 8 0 1 0 8 1
pintype=io
}
P 49300 51200 49600 51200 1 0 0
{
T 49500 51250 5 8 1 1 0 6 1
pinnumber=30
T 49500 51350 5 8 0 1 0 8 1
pinseq=30
T 49650 51200 9 8 1 1 0 0 1
pinlabel=PD0 (RxD) 0
T 49650 51200 5 8 0 1 0 2 1
pintype=io
}
P 49300 51000 49600 51000 1 0 0
{
T 49500 51050 5 8 1 1 0 6 1
pinnumber=31
T 49500 51150 5 8 0 1 0 8 1
pinseq=31
T 49650 51000 9 8 1 1 0 0 1
pinlabel=PD1 (TxD) 1
T 49650 51000 5 8 0 1 0 2 1
pintype=io
}
P 49300 50800 49600 50800 1 0 0
{
T 49500 50850 5 8 1 1 0 6 1
pinnumber=32
T 49500 50950 5 8 0 1 0 8 1
pinseq=32
T 49650 50800 9 8 1 1 0 0 1
pinlabel=PD2 (INT0) 2
T 49650 50800 5 8 0 1 0 2 1
pintype=io
}
P 49300 50600 49600 50600 1 0 0
{
T 49500 50650 5 8 1 1 0 6 1
pinnumber=1
T 49500 50750 5 8 0 1 0 8 1
pinseq=1
T 49650 50600 9 8 1 1 0 0 1
pinlabel=PD3 (INT1) 3
T 49650 50600 5 8 0 1 0 2 1
pintype=io
}
P 49300 50400 49600 50400 1 0 0
{
T 49500 50450 5 8 1 1 0 6 1
pinnumber=2
T 49500 50550 5 8 0 1 0 8 1
pinseq=2
T 49650 50400 9 8 1 1 0 0 1
pinlabel=PD4 (XCK/T0) 4
T 49650 50400 5 8 0 1 0 2 1
pintype=io
}
P 49300 47300 49600 47300 1 0 0
{
T 49500 47350 5 8 1 1 0 6 1
pinnumber=7
T 49500 47450 5 8 0 1 0 8 1
pinseq=7
T 49650 47300 9 8 1 1 0 0 1
pinlabel=PB6 (XTAL1/OSC1) 20
T 49650 47300 5 8 0 1 0 2 1
pintype=io
}
P 49300 47100 49600 47100 1 0 0
{
T 49500 47150 5 8 1 1 0 6 1
pinnumber=8
T 49500 47250 5 8 0 1 0 8 1
pinseq=8
T 49650 47100 9 8 1 1 0 0 1
pinlabel=PB7 (XTAL2/TOSC2) 21
T 49650 47100 5 8 0 1 0 2 1
pintype=io
}
P 49300 50200 49600 50200 1 0 0
{
T 49500 50250 5 8 1 1 0 6 1
pinnumber=9
T 49500 50350 5 8 0 1 0 8 1
pinseq=9
T 49650 50200 9 8 1 1 0 0 1
pinlabel=PD5 (T1) 5
T 49650 50200 5 8 0 1 0 2 1
pintype=io
}
P 49300 50000 49600 50000 1 0 0
{
T 49500 50050 5 8 1 1 0 6 1
pinnumber=10
T 49500 50150 5 8 0 1 0 8 1
pinseq=10
T 49650 50000 9 8 1 1 0 0 1
pinlabel=PD6 (AIN0) 6
T 49650 50000 5 8 0 1 0 2 1
pintype=io
}
P 49300 49800 49600 49800 1 0 0
{
T 49500 49850 5 8 1 1 0 6 1
pinnumber=11
T 49500 49950 5 8 0 1 0 8 1
pinseq=11
T 49650 49800 9 8 1 1 0 0 1
pinlabel=PD7 (AIN1) 7
T 49650 49800 5 8 0 1 0 2 1
pintype=io
}
P 49300 48500 49600 48500 1 0 0
{
T 49500 48550 5 8 1 1 0 6 1
pinnumber=12
T 49500 48650 5 8 0 1 0 8 1
pinseq=12
T 49650 48500 9 8 1 1 0 0 1
pinlabel=PB0 (ICP1) 8
T 49650 48500 5 8 0 1 0 2 1
pintype=io
}
P 49600 48300 49300 48300 1 0 1
{
T 49500 48350 5 8 1 1 0 6 1
pinnumber=13
T 49500 48450 5 8 0 1 0 8 1
pinseq=13
T 49650 48300 9 8 1 1 0 0 1
pinlabel=PB1 (OC1A) 9
T 49650 48300 5 8 0 1 0 2 1
pintype=io
}
P 49600 48100 49300 48100 1 0 1
{
T 49500 48150 5 8 1 1 0 6 1
pinnumber=14
T 49500 48250 5 8 0 1 0 8 1
pinseq=14
T 49650 48100 9 8 1 1 0 0 1
pinlabel=PB2 (SS/OC1B) 10
T 49650 48100 5 8 0 1 0 2 1
pintype=io
}
P 49600 47900 49300 47900 1 0 1
{
T 49500 47950 5 8 1 1 0 6 1
pinnumber=15
T 49500 48050 5 8 0 1 0 8 1
pinseq=15
T 49650 47900 9 8 1 1 0 0 1
pinlabel=PB3 (MOSI/OC2) 11
T 49650 47900 5 8 0 1 0 2 1
pintype=io
}
P 49600 47700 49300 47700 1 0 1
{
T 49500 47750 5 8 1 1 0 6 1
pinnumber=16
T 49500 47850 5 8 0 1 0 8 1
pinseq=16
T 49650 47700 9 8 1 1 0 0 1
pinlabel=PB4 (MISO) 12
T 49650 47700 5 8 0 1 0 2 1
pintype=io
}
P 49600 47500 49300 47500 1 0 1
{
T 49500 47550 5 8 1 1 0 6 1
pinnumber=17
T 49500 47650 5 8 0 1 0 8 1
pinseq=17
T 49650 47500 9 8 1 1 0 0 1
pinlabel=PB5 (SCK) 13
T 49650 47500 5 8 0 1 0 2 1
pintype=io
}
P 52200 47900 52500 47900 1 0 1
{
T 52300 47950 5 8 1 1 0 0 1
pinnumber=18
T 52300 48050 5 8 0 1 0 2 1
pinseq=18
T 52150 47900 9 8 1 1 0 6 1
pinlabel=AVCC
T 52150 47900 5 8 0 1 0 8 1
pintype=in
}
P 52200 48200 52500 48200 1 0 1
{
T 52300 48250 5 8 1 1 0 0 1
pinnumber=20
T 52300 48350 5 8 0 1 0 2 1
pinseq=20
T 52150 48200 9 8 1 1 0 6 1
pinlabel=AREF
T 52150 48200 5 8 0 1 0 8 1
pintype=in
}
P 52200 50200 52500 50200 1 0 1
{
T 52300 50250 5 8 1 1 0 0 1
pinnumber=23
T 52300 50350 5 8 0 1 0 2 1
pinseq=23
T 52150 50200 9 8 1 1 0 6 1
pinlabel=A0 (ADC0) PC0
T 52150 50200 5 8 0 1 0 8 1
pintype=io
}
P 52200 50000 52500 50000 1 0 1
{
T 52300 50050 5 8 1 1 0 0 1
pinnumber=24
T 52300 50150 5 8 0 1 0 2 1
pinseq=24
T 52150 50000 9 8 1 1 0 6 1
pinlabel=A1 (ADC1) PC1
T 52150 50000 5 8 0 1 0 8 1
pintype=io
}
P 52200 49800 52500 49800 1 0 1
{
T 52300 49850 5 8 1 1 0 0 1
pinnumber=25
T 52300 49950 5 8 0 1 0 2 1
pinseq=25
T 52150 49800 9 8 1 1 0 6 1
pinlabel=A2 (ADC2) PC2
T 52150 49800 5 8 0 1 0 8 1
pintype=io
}
P 52200 49600 52500 49600 1 0 1
{
T 52300 49650 5 8 1 1 0 0 1
pinnumber=26
T 52300 49750 5 8 0 1 0 2 1
pinseq=26
T 52150 49600 9 8 1 1 0 6 1
pinlabel=A3 (ADC3) PC3
T 52150 49600 5 8 0 1 0 8 1
pintype=io
}
P 52200 49400 52500 49400 1 0 1
{
T 52300 49450 5 8 1 1 0 0 1
pinnumber=27
T 52300 49550 5 8 0 1 0 2 1
pinseq=27
T 52150 49400 9 8 1 1 0 6 1
pinlabel=A4 (ADC4/SDA) PC4
T 52150 49400 5 8 0 1 0 8 1
pintype=io
}
P 52200 49200 52500 49200 1 0 1
{
T 52300 49250 5 8 1 1 0 0 1
pinnumber=28
T 52300 49350 5 8 0 1 0 2 1
pinseq=28
T 52150 49200 9 8 1 1 0 6 1
pinlabel=A5 (ADC5/SCL) PC5
T 52150 49200 5 8 0 1 0 8 1
pintype=io
}
B 49600 47000 2600 4400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 52500 50700 52200 50700 1 0 0
{
T 52500 50700 5 10 0 0 0 0 1
pintype=unknown
T 51655 50695 5 10 1 1 0 0 1
pinlabel=ADC6
T 52405 50745 5 10 1 1 0 6 1
pinnumber=19
T 52500 50700 5 10 0 0 0 0 1
pinseq=0
}
P 52500 51000 52200 51000 1 0 0
{
T 52500 51000 5 10 0 0 0 0 1
pintype=unknown
T 51655 50995 5 10 1 1 0 0 1
pinlabel=ADC7
T 52405 51045 5 10 1 1 0 6 1
pinnumber=22
T 52500 51000 5 10 0 0 0 0 1
pinseq=0
}
T 49400 52300 8 10 0 0 0 0 1
Copyright Mark Salyzyn
T 51500 51200 9 10 1 0 0 6 1
ATmega8-au
T 49400 51900 8 10 0 0 0 0 1
description=Low-power AVR 8-bit Microcontroller
T 49400 52100 8 10 0 0 0 0 1
documentation=http://rocky.digikey.com/WebLib/Atmel/Web Data/ATmeg8(L) Preliminary Complete.pdf
T 49400 51700 8 10 0 0 0 0 1
footprint=TQFP32_7
T 51600 51500 8 10 0 1 0 6 1
refdes=U?
T 51200 51500 8 10 0 1 0 6 1
numslots=0
T 51200 50850 5 10 0 1 0 6 1
net=Vcc:4,6
T 51500 50650 5 10 0 1 0 6 1
net=GND:3,5,21
T 49400 52500 8 10 0 0 0 0 1
device=ATmega8
]
{
T 49400 51700 5 10 0 0 0 0 1
footprint=TQFN32_5
T 51600 51500 5 10 1 1 0 6 1
refdes=U3
T 49400 52500 5 10 0 0 0 0 1
device=ATmega8
T 49300 46900 5 10 1 1 0 0 1
value=atmega328
}
C 57600 52900 1 90 0 EMBEDDEDdiode-2.sym
[
L 57100 53200 57500 53200 3 0 0 0 -1 -1
L 57100 53200 57300 53500 3 0 0 0 -1 -1
L 57300 53500 57500 53200 3 0 0 0 -1 -1
L 57100 53500 57500 53500 3 0 0 0 -1 -1
P 57300 52900 57300 53100 1 0 0
{
T 57250 53000 5 8 0 1 90 0 1
pinnumber=1
T 57250 53000 5 8 0 0 90 0 1
pinseq=1
T 57250 53000 5 8 0 1 90 0 1
pinlabel=1
T 57250 53000 5 8 0 1 90 0 1
pintype=pas
}
P 57300 53800 57300 53600 1 0 0
{
T 57250 53600 5 8 0 1 90 0 1
pinnumber=2
T 57250 53600 5 8 0 0 90 0 1
pinseq=2
T 57250 53600 5 8 0 1 90 0 1
pinlabel=2
T 57250 53600 5 8 0 1 90 0 1
pintype=pas
}
L 57300 53600 57300 53500 3 0 0 0 -1 -1
L 57300 53200 57300 53100 3 0 0 0 -1 -1
A 57100 53550 50 90 180 3 0 0 0 -1 -1
A 57500 53450 50 270 180 3 0 0 0 -1 -1
T 57000 53300 5 10 0 0 90 0 1
device=DIODE
T 57000 53200 8 10 0 1 90 0 1
refdes=D?
]
{
T 57000 53300 5 10 0 0 90 0 1
device=DIODE
T 57300 53900 5 10 1 1 90 0 1
refdes=D2
T 57400 53000 5 10 1 1 0 0 1
value=20V
T 57600 52900 5 10 0 0 0 0 1
footprint=0805
}
N 53900 55300 42200 55300 4
N 42200 55300 42200 54100 4
C 56500 53800 1 270 0 EMBEDDEDresistor-2.sym
[
P 56600 52900 56600 53050 1 0 0
{
T 56650 53000 5 8 0 1 270 0 1
pinnumber=2
T 56650 53000 5 8 0 0 270 0 1
pinseq=2
T 56650 53000 5 8 0 1 270 0 1
pinlabel=2
T 56650 53000 5 8 0 1 270 0 1
pintype=pas
}
P 56600 53800 56600 53650 1 0 0
{
T 56650 53700 5 8 0 1 270 0 1
pinnumber=1
T 56650 53700 5 8 0 0 270 0 1
pinseq=1
T 56650 53700 5 8 0 1 270 0 1
pinlabel=1
T 56650 53700 5 8 0 1 270 0 1
pintype=pas
}
B 56500 53050 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 56850 53400 5 10 0 0 270 0 1
device=RESISTOR
T 56800 53600 8 10 0 1 270 0 1
refdes=R?
]
{
T 56850 53400 5 10 0 0 270 0 1
device=RESISTOR
T 56700 53500 5 10 1 1 0 0 1
refdes=R7
T 56700 53300 5 10 1 1 0 0 1
value=1M
T 56500 53800 5 10 0 0 0 0 1
footprint=0402
}
C 56500 52900 1 270 0 EMBEDDEDresistor-2.sym
[
P 56600 52000 56600 52150 1 0 0
{
T 56650 52100 5 8 0 1 270 0 1
pinnumber=2
T 56650 52100 5 8 0 0 270 0 1
pinseq=2
T 56650 52100 5 8 0 1 270 0 1
pinlabel=2
T 56650 52100 5 8 0 1 270 0 1
pintype=pas
}
P 56600 52900 56600 52750 1 0 0
{
T 56650 52800 5 8 0 1 270 0 1
pinnumber=1
T 56650 52800 5 8 0 0 270 0 1
pinseq=1
T 56650 52800 5 8 0 1 270 0 1
pinlabel=1
T 56650 52800 5 8 0 1 270 0 1
pintype=pas
}
B 56500 52150 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 56850 52500 5 10 0 0 270 0 1
device=RESISTOR
T 56800 52700 8 10 0 1 270 0 1
refdes=R?
]
{
T 56850 52500 5 10 0 0 270 0 1
device=RESISTOR
T 56800 52500 5 10 1 1 0 0 1
refdes=R8
T 56000 52400 5 10 1 1 0 0 1
value=47k
T 56500 52900 5 10 0 0 0 0 1
footprint=0402
}
C 56100 51200 1 0 0 EMBEDDEDSI2306.sym
[
L 56350 51800 56600 51800 3 0 0 0 -1 -1
L 56350 51400 56600 51400 3 0 0 0 -1 -1
L 56350 51600 56450 51650 3 0 0 0 -1 -1
L 56350 51600 56450 51550 3 0 0 0 -1 -1
P 56100 51400 56300 51400 1 0 0
{
T 56100 51500 5 10 0 1 0 0 1
pinnumber=G
T 56100 51500 9 10 1 1 0 0 1
pinlabel=G
T 56100 51500 5 10 0 0 0 0 1
pinseq=2
T 56100 51500 5 10 0 0 0 0 1
pintype=pas
}
P 56600 51800 56600 52000 1 0 1
{
T 56400 51900 5 10 0 1 0 0 1
pinnumber=D
T 56400 51900 9 10 1 1 0 0 1
pinlabel=D
T 56400 51900 5 10 0 0 0 0 1
pinseq=1
T 56400 51900 5 10 0 0 0 0 1
pintype=pas
}
P 56600 51400 56600 51200 1 0 1
{
T 56400 51200 5 10 0 1 0 0 1
pinnumber=S
T 56400 51200 9 10 1 1 0 0 1
pinlabel=S
T 56400 51200 5 10 0 0 0 0 1
pinseq=3
T 56400 51200 5 10 0 0 0 0 1
pintype=pas
}
L 56350 51875 56350 51725 3 0 0 0 -1 -1
L 56350 51675 56350 51525 3 0 0 0 -1 -1
L 56350 51475 56350 51325 3 0 0 0 -1 -1
L 56300 51800 56300 51400 3 0 0 0 -1 -1
L 56350 51600 56500 51600 3 0 0 0 -1 -1
L 56500 51600 56500 51400 3 0 0 0 -1 -1
L 56600 51800 56800 51800 3 0 0 0 -1 -1
L 56600 51400 56800 51400 3 0 0 0 -1 -1
L 56900 51700 56700 51700 3 0 0 0 -1 -1
L 56900 51600 56700 51600 3 0 0 0 -1 -1
L 56900 51600 56800 51700 3 0 0 0 -1 -1
L 56700 51600 56800 51700 3 0 0 0 -1 -1
L 56800 51600 56800 51400 3 0 0 0 -1 -1
L 56800 51800 56800 51700 3 0 0 0 -1 -1
T 56700 51700 5 10 0 0 0 0 1
device=NMOS_TRANSISTOR
T 56700 51700 5 10 0 0 0 0 1
numslots=0
T 56700 51700 5 10 0 0 0 0 1
description=generic N channel MOS transistor (enhancement type)
T 56700 51800 8 10 0 1 0 0 1
footprint=Si2306
T 56800 51800 8 10 0 1 0 0 1
refdes=Q?
]
{
T 56700 51700 5 10 0 0 0 0 1
device=NMOS_TRANSISTOR
T 56800 51800 5 10 1 1 0 0 1
refdes=Q1
T 56100 51200 5 10 0 0 0 0 1
footprint=SOT23
T 56900 51400 5 10 1 1 0 0 1
value=AO3400A
}
C 56500 50900 1 0 0 EMBEDDEDgnd-1.sym
[
P 56600 51000 56600 51200 1 0 1
{
T 56658 51061 5 4 0 1 0 0 1
pinnumber=1
T 56658 51061 5 4 0 0 0 0 1
pinseq=1
T 56658 51061 5 4 0 1 0 0 1
pinlabel=1
T 56658 51061 5 4 0 1 0 0 1
pintype=pwr
}
L 56500 51000 56700 51000 3 0 0 0 -1 -1
L 56555 50950 56645 50950 3 0 0 0 -1 -1
L 56580 50910 56620 50910 3 0 0 0 -1 -1
T 56800 50950 8 10 0 0 0 0 1
net=GND:1
]
C 43500 46500 1 0 0 EMBEDDEDmax232-2.sym
[
P 45200 49600 45500 49600 1 0 1
{
T 45300 49650 5 8 1 1 0 0 1
pinnumber=2
T 45300 49550 5 8 0 1 0 2 1
pinseq=2
T 45150 49600 9 8 1 1 0 6 1
pinlabel=V+
T 45150 49600 5 8 0 1 0 8 1
pintype=pwr
}
P 43800 49200 43500 49200 1 0 1
{
T 43700 49250 5 8 1 1 0 6 1
pinnumber=3
T 43700 49150 5 8 0 1 0 8 1
pinseq=3
T 43850 49200 9 8 1 1 0 0 1
pinlabel=C1-
T 43850 49200 5 8 0 1 0 2 1
pintype=pas
}
P 43800 48800 43500 48800 1 0 1
{
T 43700 48850 5 8 1 1 0 6 1
pinnumber=4
T 43700 48750 5 8 0 1 0 8 1
pinseq=4
T 43850 48800 9 8 1 1 0 0 1
pinlabel=C2+
T 43850 48800 5 8 0 1 0 2 1
pintype=pas
}
P 43800 48400 43500 48400 1 0 1
{
T 43700 48450 5 8 1 1 0 6 1
pinnumber=5
T 43700 48350 5 8 0 1 0 8 1
pinseq=5
T 43850 48400 9 8 1 1 0 0 1
pinlabel=C2-
T 43850 48400 5 8 0 1 0 2 1
pintype=pas
}
P 45200 48800 45500 48800 1 0 1
{
T 45300 48850 5 8 1 1 0 0 1
pinnumber=6
T 45300 48750 5 8 0 1 0 2 1
pinseq=6
T 45150 48800 9 8 1 1 0 6 1
pinlabel=V-
T 45150 48800 5 8 0 1 0 8 1
pintype=pwr
}
P 43800 47200 43500 47200 1 0 1
{
T 43700 47250 5 8 1 1 0 6 1
pinnumber=7
T 43700 47150 5 8 0 1 0 8 1
pinseq=7
T 43850 47200 9 8 1 1 0 0 1
pinlabel=Tx2 Out
T 43850 47200 5 8 0 1 0 2 1
pintype=out
}
P 43800 46800 43500 46800 1 0 1
{
T 43700 46850 5 8 1 1 0 6 1
pinnumber=8
T 43700 46750 5 8 0 1 0 8 1
pinseq=8
T 43850 46800 9 8 1 1 0 0 1
pinlabel=Rx2 In
T 43850 46800 5 8 0 1 0 2 1
pintype=in
}
P 45200 46800 45500 46800 1 0 1
{
T 45300 46850 5 8 1 1 0 0 1
pinnumber=9
T 45300 46750 5 8 0 1 0 2 1
pinseq=9
T 45150 46800 9 8 1 1 0 6 1
pinlabel=Rx2 Out
T 45150 46800 5 8 0 1 0 8 1
pintype=out
}
P 45200 47200 45500 47200 1 0 1
{
T 45300 47250 5 8 1 1 0 0 1
pinnumber=10
T 45300 47150 5 8 0 1 0 2 1
pinseq=10
T 45150 47200 9 8 1 1 0 6 1
pinlabel=Tx2 In
T 45150 47200 5 8 0 1 0 8 1
pintype=in
}
P 45200 48000 45500 48000 1 0 1
{
T 45300 48050 5 8 1 1 0 0 1
pinnumber=11
T 45300 47950 5 8 0 1 0 2 1
pinseq=11
T 45150 48000 9 8 1 1 0 6 1
pinlabel=Tx1 In
T 45150 48000 5 8 0 1 0 8 1
pintype=in
}
P 45200 47600 45500 47600 1 0 1
{
T 45300 47650 5 8 1 1 0 0 1
pinnumber=12
T 45300 47550 5 8 0 1 0 2 1
pinseq=12
T 45150 47600 9 8 1 1 0 6 1
pinlabel=Rx1 Out
T 45150 47600 5 8 0 1 0 8 1
pintype=out
}
P 43800 47600 43500 47600 1 0 1
{
T 43700 47650 5 8 1 1 0 6 1
pinnumber=13
T 43700 47550 5 8 0 1 0 8 1
pinseq=13
T 43850 47600 9 8 1 1 0 0 1
pinlabel=Rx1 In
T 43850 47600 5 8 0 1 0 2 1
pintype=in
}
P 43800 48000 43500 48000 1 0 1
{
T 43700 48050 5 8 1 1 0 6 1
pinnumber=14
T 43700 47950 5 8 0 1 0 8 1
pinseq=14
T 43850 48000 9 8 1 1 0 0 1
pinlabel=Tx1 Out
T 43850 48000 5 8 0 1 0 2 1
pintype=out
}
P 43800 49600 43500 49600 1 0 1
{
T 43700 49650 5 8 1 1 0 6 1
pinnumber=1
T 43700 49550 5 8 0 1 0 8 1
pinseq=1
T 43850 49600 9 8 1 1 0 0 1
pinlabel=C1+
T 43850 49600 5 8 0 1 0 2 1
pintype=pas
}
B 43800 46500 1400 3400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 43800 48200 45200 48200 3 0 0 2 50 50
L 43800 47400 45200 47400 3 0 0 2 50 50
T 43800 50150 5 10 0 0 0 0 1
device=MAX232
T 45200 50000 8 10 0 1 0 6 1
refdes=U?
T 43800 50350 5 10 0 0 0 0 1
footprint=DIP16
T 43800 50550 5 10 0 0 0 0 1
description=5V-powered dual RS-232 driver/receiver
T 43800 51150 5 10 0 0 0 0 1
numslots=0
T 43800 50750 5 10 0 0 0 0 1
net=Vcc:16
T 43800 50950 5 10 0 0 0 0 1
net=GND:15
T 43800 49950 9 10 1 0 0 0 1
MAX232
T 43800 51350 5 10 0 0 0 0 1
documentation=http://pdfserv.maxim-ic.com/en/ds/MAX220-MAX249.pdf
]
{
T 43800 50150 5 10 0 0 0 0 1
device=MAX232
T 45200 50000 5 10 1 1 0 6 1
refdes=U2
T 43800 50350 5 10 0 0 0 0 1
footprint=SO16
T 43500 46500 5 10 1 1 0 0 1
value=SP3232
}
N 49300 51000 48500 51000 4
{
T 48200 51000 5 10 1 1 0 0 1
netname=TX
}
N 46200 48000 45500 48000 4
{
T 45700 48100 5 10 1 1 0 0 1
netname=TX
}
N 45500 47600 46200 47600 4
{
T 45500 47600 5 10 1 1 0 0 1
netname=RX
}
N 48500 51200 49300 51200 4
{
T 48200 51200 5 10 1 1 0 0 1
netname=RX
}
C 54100 49000 1 90 0 EMBEDDEDresistor-2.sym
[
P 54000 49900 54000 49750 1 0 0
{
T 53950 49800 5 8 0 1 90 0 1
pinnumber=2
T 53950 49800 5 8 0 0 90 0 1
pinseq=2
T 53950 49800 5 8 0 1 90 0 1
pinlabel=2
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C 55200 43900 1 180 0 EMBEDDEDresistor-2.sym
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C 54100 44400 1 0 1 EMBEDDEDgnd-1.sym
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C 53800 45600 1 270 0 EMBEDDEDled-1.sym
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{
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C 54200 41700 1 0 1 EMBEDDEDgnd-1.sym
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C 48100 46600 1 270 1 EMBEDDEDresistor-2.sym
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C 48100 45400 1 0 0 EMBEDDEDgnd-1.sym
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{
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T 49500 47500 5 10 1 1 0 6 1
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C 41700 53300 1 0 1 EMBEDDEDconnector2-2.sym
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{
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{
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{
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C 60800 53800 1 0 0 EMBEDDEDconnector2-2.sym
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P 60800 54200 61000 54200 1 0 0
{
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T 61000 54150 5 8 0 1 0 8 1
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T 61150 54200 9 8 1 1 0 0 1
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T 61150 54200 5 8 0 1 0 2 1
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V 61050 54200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 61100 53800 400 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
]
{
T 61500 55100 5 10 1 1 0 6 1
refdes=CONN4
T 61100 55050 5 10 0 0 0 0 1
device=CONNECTOR_2
T 61100 55250 5 10 0 0 0 0 1
footprint=SIP2N
}
C 41600 53400 1 0 0 EMBEDDEDgnd-1.sym
[
P 41700 53500 41700 53700 1 0 1
{
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pinnumber=1
T 41758 53561 5 4 0 0 0 0 1
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T 41758 53561 5 4 0 1 0 0 1
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T 41758 53561 5 4 0 1 0 0 1
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L 41600 53500 41800 53500 3 0 0 0 -1 -1
L 41655 53450 41745 53450 3 0 0 0 -1 -1
L 41680 53410 41720 53410 3 0 0 0 -1 -1
T 41900 53450 8 10 0 0 0 0 1
net=GND:1
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C 60700 53900 1 0 0 EMBEDDEDgnd-1.sym
[
P 60800 54000 60800 54200 1 0 1
{
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T 60858 54061 5 4 0 1 0 0 1
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L 60700 54000 60900 54000 3 0 0 0 -1 -1
L 60755 53950 60845 53950 3 0 0 0 -1 -1
L 60780 53910 60820 53910 3 0 0 0 -1 -1
T 61000 53950 8 10 0 0 0 0 1
net=GND:1
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C 55100 49800 1 0 0 EMBEDDED18b20.sym
[
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P 55600 49900 55600 50100 1 0 0
{
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T 55550 50000 5 8 0 0 90 0 1
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T 55600 50155 5 8 0 1 90 0 1
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T 55550 50000 5 8 0 1 90 0 1
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}
P 55600 50600 55600 50400 1 0 0
{
T 55550 50495 5 8 0 1 90 0 1
pinnumber=3
T 55550 50400 5 8 0 0 90 0 1
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T 55600 50345 5 8 0 1 90 6 1
pinlabel=VDD
T 55550 50400 5 8 0 1 90 0 1
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}
T 55300 50300 8 10 0 1 90 0 1
refdes=D?
P 55100 50200 55400 50200 1 0 0
{
T 55400 50200 5 10 0 1 0 0 1
pintype=pas
T 55455 50195 5 10 0 1 0 0 1
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T 55305 50245 5 10 0 1 0 6 1
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T 55400 50200 5 10 0 0 0 0 1
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}
]
{
T 55500 50400 5 10 0 0 0 0 1
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T 55400 50600 5 10 1 1 180 0 1
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T 55800 50000 5 10 1 1 0 0 1
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T 55100 49800 5 10 0 0 0 0 1
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C 55500 49600 1 0 0 EMBEDDEDgnd-1.sym
[
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{
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L 55500 49700 55700 49700 3 0 0 0 -1 -1
L 55555 49650 55645 49650 3 0 0 0 -1 -1
L 55580 49610 55620 49610 3 0 0 0 -1 -1
T 55800 49650 8 10 0 0 0 0 1
net=GND:1
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C 55400 50600 1 0 0 EMBEDDEDvcc-1.sym
[
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{
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L 55450 50800 55750 50800 3 0 0 0 -1 -1
T 55475 50850 9 8 1 0 0 0 1
Vcc
T 55850 50800 8 10 0 0 0 0 1
net=Vcc:1
]
C 53300 51100 1 270 0 EMBEDDEDresistor-2.sym
[
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{
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T 53450 50300 5 8 0 1 270 0 1
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P 53400 51100 53400 50950 1 0 0
{
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T 53450 51000 5 8 0 1 270 0 1
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}
B 53300 50350 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 53650 50700 5 10 0 0 270 0 1
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T 53600 50900 8 10 0 1 270 0 1
refdes=R?
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{
T 53650 50700 5 10 0 0 270 0 1
device=RESISTOR
T 53600 50700 5 10 1 1 0 0 1
refdes=R10
T 52800 50600 5 10 1 1 0 0 1
value=3.3k
T 53300 51100 5 10 0 0 0 0 1
footprint=0402
}
C 53200 51100 1 0 0 EMBEDDEDvcc-1.sym
[
P 53400 51100 53400 51300 1 0 0
{
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T 53450 51150 5 6 0 0 0 0 1
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pintype=pwr
}
L 53250 51300 53550 51300 3 0 0 0 -1 -1
T 53275 51350 9 8 1 0 0 0 1
Vcc
T 53650 51300 8 10 0 0 0 0 1
net=Vcc:1
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N 52500 49600 53400 49600 4
N 53400 49600 53400 50200 4
N 53400 50200 55100 50200 4
C 55400 47600 1 0 0 EMBEDDEDconnector3-2.sym
[
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T 55700 49250 5 10 0 0 0 0 1
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footprint=SIP3N
T 55700 49650 5 10 0 0 0 0 1
author=Leon Kos
T 55700 49850 5 10 0 0 0 0 1
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T 55700 50050 5 10 0 0 0 0 1
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P 55400 48800 55600 48800 1 0 0
{
T 55600 48850 5 8 0 1 0 6 1
pinnumber=1
T 55600 48750 5 8 0 1 0 8 1
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T 55750 48800 9 8 1 1 0 0 1
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T 55750 48800 5 8 0 1 0 2 1
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V 55650 48800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 55400 48400 55600 48400 1 0 0
{
T 55600 48450 5 8 0 1 0 6 1
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T 55600 48350 5 8 0 1 0 8 1
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T 55750 48400 9 8 1 1 0 0 1
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T 55750 48400 5 8 0 1 0 2 1
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}
V 55650 48400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 55400 48000 55600 48000 1 0 0
{
T 55600 48050 5 8 0 1 0 6 1
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T 55750 48000 9 8 1 1 0 0 1
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T 55750 48000 5 8 0 1 0 2 1
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V 55650 48000 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 55700 47600 400 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
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{
T 56100 49300 5 10 1 1 0 6 1
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C 55200 48800 1 0 0 EMBEDDEDvcc-1.sym
[
P 55400 48800 55400 49000 1 0 0
{
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T 55450 48850 5 6 0 1 0 0 1
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L 55250 49000 55550 49000 3 0 0 0 -1 -1
T 55275 49050 9 8 1 0 0 0 1
Vcc
T 55650 49000 8 10 0 0 0 0 1
net=Vcc:1
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C 55300 47700 1 0 0 EMBEDDEDgnd-1.sym
[
P 55400 47800 55400 48000 1 0 1
{
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L 55300 47800 55500 47800 3 0 0 0 -1 -1
L 55355 47750 55445 47750 3 0 0 0 -1 -1
L 55380 47710 55420 47710 3 0 0 0 -1 -1
T 55600 47750 8 10 0 0 0 0 1
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N 55400 48400 54900 48400 4
N 54900 48400 54900 50200 4
C 45500 45100 1 0 1 EMBEDDEDconnector2-2.sym
[
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T 45200 46350 5 10 0 0 0 6 1
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T 45200 46550 5 10 0 0 0 6 1
footprint=SIP2N
T 45200 46750 5 10 0 0 0 6 1
author=Leon Kos
T 45200 46950 5 10 0 0 0 6 1
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T 45200 47150 5 10 0 0 0 6 1
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P 45500 45900 45300 45900 1 0 0
{
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T 45150 45900 9 8 1 1 0 6 1
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T 45150 45900 5 8 0 1 0 8 1
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V 45250 45900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 45500 45500 45300 45500 1 0 0
{
T 45300 45550 5 8 0 1 0 0 1
pinnumber=2
T 45300 45450 5 8 0 1 0 2 1
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T 45150 45500 9 8 1 1 0 6 1
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T 45150 45500 5 8 0 1 0 8 1
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}
V 45250 45500 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44800 45100 400 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
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{
T 44000 46000 5 10 1 1 0 0 1
refdes=CONN3
T 45200 46350 5 10 0 0 0 6 1
device=CONNECTOR_2
T 45200 46550 5 10 0 0 0 6 1
footprint=SIP2N
}
C 49000 46400 1 0 0 EMBEDDEDcrystal-1.sym
[
P 49000 46500 49200 46500 1 0 0
{
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P 49500 46500 49700 46500 1 0 1
{
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pinnumber=2
T 49550 46450 5 8 0 1 0 2 1
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T 49450 46500 9 8 0 1 0 6 1
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T 49450 46500 5 8 0 1 0 8 1
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}
B 49250 46400 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 49200 46900 5 10 0 0 0 0 1
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L 49200 46640 49200 46360 3 0 0 0 -1 -1
L 49500 46640 49500 46360 3 0 0 0 -1 -1
T 49200 46700 8 10 0 1 0 0 1
refdes=U?
T 49200 47500 5 10 0 0 0 0 1
description=crystal
T 49200 47300 5 10 0 0 0 0 1
numslots=0
T 49200 47100 5 10 0 0 0 0 1
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{
T 49200 46900 5 10 0 0 0 0 1
device=CRYSTAL
T 49800 46500 5 10 1 1 0 0 1
refdes=U6
T 49200 47100 5 10 0 0 0 0 1
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T 49000 46400 5 10 0 0 0 0 1
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T 49900 46200 5 10 1 1 0 0 1
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}
N 49000 46500 49000 47300 4
N 49000 47300 49300 47300 4
N 49300 47100 49300 46800 4
N 49300 46800 49700 46800 4
N 49700 46800 49700 46500 4
C 49200 45600 1 90 0 EMBEDDEDcapacitor-1.sym
[
P 49000 45600 49000 45800 1 0 0
{
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T 49000 45800 9 8 0 1 90 0 1
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T 49000 45800 5 8 0 1 90 2 1
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P 49000 46500 49000 46300 1 0 0
{
T 48950 46350 5 8 0 1 90 0 1
pinnumber=2
T 49050 46350 5 8 0 1 90 2 1
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T 49000 46300 9 8 0 1 90 6 1
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T 49000 46300 5 8 0 1 90 8 1
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L 48800 46000 49200 46000 3 0 0 0 -1 -1
L 48800 46100 49200 46100 3 0 0 0 -1 -1
L 49000 46300 49000 46100 3 0 0 0 -1 -1
L 49000 46000 49000 45800 3 0 0 0 -1 -1
T 48500 45800 5 10 0 0 90 0 1
device=CAPACITOR
T 48700 45800 8 10 0 1 90 0 1
refdes=C?
T 47900 45800 5 10 0 0 90 0 1
description=capacitor
T 48100 45800 5 10 0 0 90 0 1
numslots=0
T 48300 45800 5 10 0 0 90 0 1
symversion=0.1
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{
T 48500 45800 5 10 0 0 90 0 1
device=CAPACITOR
T 48800 45900 5 10 1 1 180 0 1
refdes=C11
T 48300 45800 5 10 0 0 90 0 1
symversion=0.1
T 49200 45600 5 10 0 0 0 0 1
footprint=0402
T 49200 45600 5 10 1 1 0 0 1
value=22pF
}
C 49900 45600 1 90 0 EMBEDDEDcapacitor-1.sym
[
P 49700 45600 49700 45800 1 0 0
{
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pinnumber=1
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pinseq=1
T 49700 45800 9 8 0 1 90 0 1
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T 49700 45800 5 8 0 1 90 2 1
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P 49700 46500 49700 46300 1 0 0
{
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pinnumber=2
T 49750 46350 5 8 0 1 90 2 1
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T 49700 46300 9 8 0 1 90 6 1
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T 49700 46300 5 8 0 1 90 8 1
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L 49500 46000 49900 46000 3 0 0 0 -1 -1
L 49500 46100 49900 46100 3 0 0 0 -1 -1
L 49700 46300 49700 46100 3 0 0 0 -1 -1
L 49700 46000 49700 45800 3 0 0 0 -1 -1
T 49200 45800 5 10 0 0 90 0 1
device=CAPACITOR
T 49400 45800 8 10 0 1 90 0 1
refdes=C?
T 48600 45800 5 10 0 0 90 0 1
description=capacitor
T 48800 45800 5 10 0 0 90 0 1
numslots=0
T 49000 45800 5 10 0 0 90 0 1
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{
T 49200 45800 5 10 0 0 90 0 1
device=CAPACITOR
T 50300 46000 5 10 1 1 180 0 1
refdes=C12
T 49000 45800 5 10 0 0 90 0 1
symversion=0.1
T 49900 45600 5 10 0 0 0 0 1
footprint=0402
T 49900 45600 5 10 1 1 0 0 1
value=22pF
}
C 49100 45300 1 0 1 EMBEDDEDgnd-1.sym
[
P 49000 45400 49000 45600 1 0 1
{
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pinnumber=1
T 48942 45461 5 4 0 0 0 6 1
pinseq=1
T 48942 45461 5 4 0 1 0 6 1
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T 48942 45461 5 4 0 1 0 6 1
pintype=pwr
}
L 49100 45400 48900 45400 3 0 0 0 -1 -1
L 49045 45350 48955 45350 3 0 0 0 -1 -1
L 49020 45310 48980 45310 3 0 0 0 -1 -1
T 48800 45350 8 10 0 0 0 6 1
net=GND:1
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C 49800 45300 1 0 1 EMBEDDEDgnd-1.sym
[
P 49700 45400 49700 45600 1 0 1
{
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pinnumber=1
T 49642 45461 5 4 0 0 0 6 1
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T 49642 45461 5 4 0 1 0 6 1
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T 49642 45461 5 4 0 1 0 6 1
pintype=pwr
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L 49800 45400 49600 45400 3 0 0 0 -1 -1
L 49745 45350 49655 45350 3 0 0 0 -1 -1
L 49720 45310 49680 45310 3 0 0 0 -1 -1
T 49500 45350 8 10 0 0 0 6 1
net=GND:1
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C 57000 50800 1 0 1 EMBEDDEDAO4407A.sym
[
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L 54100 54400 54100 52800 3 0 0 0 -1 -1
L 56200 54400 55500 54400 3 0 0 0 -1 -1
P 53900 53800 54100 53800 1 0 0
{
T 54005 53950 5 8 1 1 180 0 1
pinnumber=7
T 54150 53700 5 8 0 0 90 2 1
pinseq=7
T 54155 53900 5 8 1 1 180 6 1
pinlabel=D
T 54150 53700 5 8 0 1 90 2 1
pintype=pass
}
P 53900 54200 54100 54200 1 0 0
{
T 53895 54350 5 8 1 1 180 6 1
pinnumber=8
T 55050 54300 5 8 0 0 90 2 1
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T 54245 54300 5 8 1 1 180 0 1
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T 55050 54300 5 8 0 1 90 2 1
pintype=pas
}
P 56400 54200 56200 54200 1 0 0
{
T 56200 54200 5 10 0 1 0 6 1
pintype=pas
T 56055 54295 5 10 1 1 0 0 1
pinlabel=S
T 56405 54245 5 10 1 1 0 6 1
pinnumber=1
T 56200 54200 5 10 0 1 0 6 1
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P 56400 53400 56200 53400 1 0 0
{
T 56300 53400 5 10 0 0 0 6 1
pintype=unknown
T 56145 53495 5 10 1 1 0 6 1
pinlabel=S
T 56295 53445 5 10 1 1 0 0 1
pinnumber=3
T 56300 53400 5 10 0 0 0 6 1
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}
P 56400 53800 56200 53800 1 0 0
{
T 56300 53800 5 10 0 0 0 6 1
pintype=unknown
T 56145 53895 5 10 1 1 0 6 1
pinlabel=S
T 56295 53845 5 10 1 1 0 0 1
pinnumber=2
T 56300 53800 5 10 0 0 0 6 1
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P 53900 53400 54100 53400 1 0 0
{
T 53700 53400 5 10 0 0 0 6 1
pintype=unknown
T 54155 53395 5 10 1 1 0 0 1
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T 54005 53445 5 10 1 1 0 6 1
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T 53700 53400 5 10 0 0 0 6 1
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P 56400 53000 56200 53000 1 0 0
{
T 56400 53000 5 10 0 0 0 6 1
pintype=unknown
T 56145 52995 5 10 1 1 0 6 1
pinlabel=G
T 56295 53045 5 10 1 1 0 0 1
pinnumber=4
T 56400 53000 5 10 0 0 0 6 1
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}
P 53900 53000 54100 53000 1 0 0
{
T 53900 53000 5 10 0 0 0 6 1
pintype=unknown
T 54155 52995 5 10 1 1 0 0 1
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T 54005 53045 5 10 1 1 0 6 1
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T 53900 53000 5 10 0 0 0 6 1
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A 55200 54400 300 180 180 3 0 0 0 -1 -1
L 54900 54400 54100 54400 3 0 0 0 -1 -1
L 54900 53550 54900 53800 3 0 0 0 -1 -1
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L 55150 53600 55100 53700 3 0 0 0 -1 -1
L 55100 53600 55100 53700 3 0 0 0 -1 -1
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L 55100 53700 55300 53700 3 0 0 0 -1 -1
L 55000 54000 55100 53900 3 0 0 0 -1 -1
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L 54900 53900 55000 53900 3 0 0 0 -1 -1
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L 55300 53800 55300 53900 3 0 0 0 -1 -1
L 55050 53600 55100 53700 3 0 0 0 -1 -1
L 54100 53800 54900 53800 3 0 0 0 -1 -1
L 55300 53000 55300 53500 3 0 0 0 -1 -1
L 55300 53800 56200 53800 3 0 0 0 -1 -1
L 55300 53000 56200 53000 3 0 0 0 -1 -1
L 55900 53400 55900 54200 3 0 0 0 -1 -1
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L 54400 54200 54100 54200 3 0 0 0 -1 -1
L 54400 53400 54400 54200 3 0 0 0 -1 -1
T 56600 51400 5 10 0 0 0 6 1
device=AO4407A
T 55905 54600 8 10 0 1 0 6 1
footprint=SO8
T 55305 54300 8 10 0 1 0 6 1
refdes=U?
T 55805 53100 8 10 0 1 0 6 1
value=P-MOS
]
{
T 56600 51400 5 10 0 0 0 6 1
device=AO4407A
T 55905 54600 5 10 0 1 0 6 1
footprint=SO8
T 55305 54300 5 10 1 1 0 6 1
refdes=U11
T 55100 53100 5 10 1 1 0 6 1
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}
N 60500 56000 60500 53000 4
N 60800 54600 60500 54600 4
N 53900 53000 53900 56000 4
N 52500 49400 53300 49400 4
{
T 52500 49400 5 10 1 1 0 0 1
netname=A4
}
N 52500 49200 53300 49200 4
{
T 52500 49200 5 10 1 1 0 0 1
netname=A5
}
N 52000 42400 52000 42000 4
C 51900 41300 1 0 0 EMBEDDEDgnd-1.sym
[
P 52000 41400 52000 41600 1 0 1
{
T 52058 41461 5 4 0 1 0 0 1
pinnumber=1
T 52058 41461 5 4 0 0 0 0 1
pinseq=1
T 52058 41461 5 4 0 1 0 0 1
pinlabel=1
T 52058 41461 5 4 0 1 0 0 1
pintype=pwr
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L 51900 41400 52100 41400 3 0 0 0 -1 -1
L 51955 41350 52045 41350 3 0 0 0 -1 -1
L 51980 41310 52020 41310 3 0 0 0 -1 -1
T 52200 41350 8 10 0 0 0 0 1
net=GND:1
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C 48900 41300 1 0 0 EMBEDDEDgnd-1.sym
[
P 49000 41400 49000 41600 1 0 1
{
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pinnumber=1
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T 49058 41461 5 4 0 1 0 0 1
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T 49058 41461 5 4 0 1 0 0 1
pintype=pwr
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L 48900 41400 49100 41400 3 0 0 0 -1 -1
L 48955 41350 49045 41350 3 0 0 0 -1 -1
L 48980 41310 49020 41310 3 0 0 0 -1 -1
T 49200 41350 8 10 0 0 0 0 1
net=GND:1
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N 49000 41600 49000 42000 4
C 59100 45500 1 0 0 EMBEDDEDconnector2-2.sym
[
P 59100 46300 59300 46300 1 0 0
{
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{
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C 52700 47900 1 0 0 EMBEDDEDvcc-1.sym
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{
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C 54000 48000 1 270 1 switch-pushbutton-no-1.sym
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{
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{
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C 57400 50800 1 0 0 EMBEDDEDAO4407A.sym
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{
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{
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{
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{
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{
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P 60500 53000 60300 53000 1 0 0
{
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{
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C 57000 52600 1 0 1 EMBEDDEDAO4407A.sym
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P 53900 55600 54100 55600 1 0 0
{
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P 53900 56000 54100 56000 1 0 0
{
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P 56400 56000 56200 56000 1 0 0
{
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P 56400 55200 56200 55200 1 0 0
{
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P 56400 55600 56200 55600 1 0 0
{
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P 53900 55200 54100 55200 1 0 0
{
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P 56400 54800 56200 54800 1 0 0
{
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P 53900 54800 54100 54800 1 0 0
{
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T 56600 53200 5 10 0 0 0 6 1
device=AO4407A
T 55905 56400 8 10 0 1 0 6 1
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{
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N 56400 54200 56400 53400 4
N 58000 54200 58000 53400 4
N 56400 55600 58000 55600 4
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N 56400 54800 58000 54800 4
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N 56400 53000 56400 52900 4
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C 44200 43000 1 0 0 EMBEDDEDgnd-1.sym
[
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{
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pinnumber=1
T 44358 43161 5 4 0 0 0 0 1
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T 44358 43161 5 4 0 1 0 0 1
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T 44358 43161 5 4 0 1 0 0 1
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L 44200 43100 44400 43100 3 0 0 0 -1 -1
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L 44280 43010 44320 43010 3 0 0 0 -1 -1
T 44500 43050 8 10 0 0 0 0 1
net=GND:1
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N 43600 43700 44300 43700 4
{
T 43600 43700 5 10 1 1 0 0 1
netname=RX
}
N 44300 44100 43600 44100 4
{
T 43800 44200 5 10 1 1 0 0 1
netname=TX
}
N 43600 42900 44300 42900 4
{
T 43600 42900 5 10 1 1 0 0 1
netname=HRX
}
N 44300 42500 43600 42500 4
{
T 43800 42600 5 10 1 1 0 0 1
netname=HTX
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C 44300 41700 1 0 0 connector6-2.sym
{
T 45000 44600 5 10 1 1 0 6 1
refdes=CONN10
T 44600 44550 5 10 0 0 0 0 1
device=CONNECTOR_6
T 44600 44750 5 10 0 0 0 0 1
footprint=SIP6N
}
N 43400 42100 44300 42100 4
{
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netname=RTS
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T 56000 41100 9 10 1 0 0 0 1
pc remote control
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liushiwei@gmail.com
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https://github.com/lshw/prc
T 59200 40400 9 10 1 0 0 0 1
2019-12-22