diff --git a/esp-alloc/src/lib.rs b/esp-alloc/src/lib.rs
index 8f63172c1c3..8ba6207310d 100644
--- a/esp-alloc/src/lib.rs
+++ b/esp-alloc/src/lib.rs
@@ -475,23 +475,19 @@ impl EspHeapInner {
         }
 
         cfg_select! {
-            feature = "internal-heap-stats" => {
-                HeapStats {
-                    region_stats,
-                    size: free + used,
-                    current_usage: used,
-                    max_usage: self.internal_heap_stats.max_usage,
-                    total_allocated: self.internal_heap_stats.total_allocated,
-                    total_freed: self.internal_heap_stats.total_freed,
-                }
-            }
-            _ => {
-                HeapStats {
-                    region_stats,
-                    size: free + used,
-                    current_usage: used,
-                }
-            }
+            feature = "internal-heap-stats" => HeapStats {
+                region_stats,
+                size: free + used,
+                current_usage: used,
+                max_usage: self.internal_heap_stats.max_usage,
+                total_allocated: self.internal_heap_stats.total_allocated,
+                total_freed: self.internal_heap_stats.total_freed,
+            },
+            _ => HeapStats {
+                region_stats,
+                size: free + used,
+                current_usage: used,
+            },
         }
     }
 
diff --git a/esp-bootloader-esp-idf/src/partitions.rs b/esp-bootloader-esp-idf/src/partitions.rs
index fa468172388..749412eaeec 100644
--- a/esp-bootloader-esp-idf/src/partitions.rs
+++ b/esp-bootloader-esp-idf/src/partitions.rs
@@ -350,9 +350,7 @@ impl<'a> PartitionTable<'a> {
         // See <https://github.com/espressif/esp-idf/blob/758939caecb16e5542b3adfba0bc85025517db45/components/hal/mmu_hal.c#L124>
         cfg_select! {
             feature = "esp32" => {
-                let paddr = unsafe {
-                    ((0x3FF10000 as *const u32).read_volatile() & 0xff) << 16
-                };
+                let paddr = unsafe { ((0x3FF10000 as *const u32).read_volatile() & 0xff) << 16 };
             }
             feature = "esp32s2" => {
                 let paddr = unsafe {
@@ -361,14 +359,10 @@ impl<'a> PartitionTable<'a> {
             }
             feature = "esp32s3" => {
                 // Revisit this once we support XiP from PSRAM for ESP32-S3
-                let paddr = unsafe {
-                    ((0x600C5000 as *const u32).read_volatile() & 0xff) << 16
-                };
+                let paddr = unsafe { ((0x600C5000 as *const u32).read_volatile() & 0xff) << 16 };
             }
             any(feature = "esp32c2", feature = "esp32c3") => {
-                let paddr = unsafe {
-                    ((0x600c5000 as *const u32).read_volatile() & 0xff) << 16
-                };
+                let paddr = unsafe { ((0x600c5000 as *const u32).read_volatile() & 0xff) << 16 };
             }
             feature = "esp32p4" => {
                 // DR_REG_FLASH_SPI0_BASE : 0x5008C000 = DR_REG_HPPERIPH0_BASE + 0x8C000
@@ -386,7 +380,12 @@ impl<'a> PartitionTable<'a> {
                     (((0x20500000 + 0x37c) as *const u32).read_volatile() & 0x7ff) << 16 // SPI_MEM_C_MMU_ITEM_CONTENT_REG
                 };
             }
-            any(feature = "esp32c5", feature = "esp32c6", feature = "esp32c61", feature = "esp32h2") => {
+            any(
+                feature = "esp32c5",
+                feature = "esp32c6",
+                feature = "esp32c61",
+                feature = "esp32h2"
+            ) => {
                 let paddr = unsafe {
                     ((0x60002000 + 0x380) as *mut u32).write_volatile(0);
                     (((0x60002000 + 0x37c) as *const u32).read_volatile() & 0xff) << 16
diff --git a/esp-hal/src/aes/mod.rs b/esp-hal/src/aes/mod.rs
index 8d677e84c28..67c1886b4a7 100644
--- a/esp-hal/src/aes/mod.rs
+++ b/esp-hal/src/aes/mod.rs
@@ -203,12 +203,8 @@ impl<'d> Aes<'d> {
 
     fn is_idle(&mut self) -> bool {
         cfg_select! {
-            esp32 => {
-                self.regs().idle().read().idle().bit_is_set()
-            }
-            _ => {
-                self.regs().state().read().state().bits() == 0
-            }
+            esp32 => self.regs().idle().read().idle().bit_is_set(),
+            _ => self.regs().state().read().state().bits() == 0,
         }
     }
 
diff --git a/esp-hal/src/analog/adc/riscv.rs b/esp-hal/src/analog/adc/riscv.rs
index 420c3bf8865..80393e0192a 100644
--- a/esp-hal/src/analog/adc/riscv.rs
+++ b/esp-hal/src/analog/adc/riscv.rs
@@ -567,12 +567,8 @@ pub(super) fn acquire_async_adc() {
 
 pub(super) fn release_async_adc() -> bool {
     cfg_select! {
-        all(adc_adc1, adc_adc2) => {
-            ASYNC_ADC_COUNT.fetch_sub(1, Ordering::Relaxed) == 1
-        }
-        _ => {
-            true
-        }
+        all(adc_adc1, adc_adc2) => ASYNC_ADC_COUNT.fetch_sub(1, Ordering::Relaxed) == 1,
+        _ => true,
     }
 }
 
diff --git a/esp-hal/src/clock/mod.rs b/esp-hal/src/clock/mod.rs
index 48f7d2ba73e..ebaf7f8e6ab 100644
--- a/esp-hal/src/clock/mod.rs
+++ b/esp-hal/src/clock/mod.rs
@@ -112,24 +112,12 @@ impl CpuClock {
     /// ```
     pub const fn max() -> Self {
         cfg_select! {
-            esp32c2 => {
-                Self::_120MHz
-            }
-            any(esp32c3, esp32c6, esp32c61) => {
-                Self::_160MHz
-            }
-            esp32h2 => {
-                Self::_96MHz
-            }
-            esp32p4 => {
-                Self::_400MHz
-            }
-            esp32s31 => {
-                Self::_320MHz
-            }
-            _ => {
-                Self::_240MHz
-            }
+            esp32c2 => Self::_120MHz,
+            any(esp32c3, esp32c6, esp32c61) => Self::_160MHz,
+            esp32h2 => Self::_96MHz,
+            esp32p4 => Self::_400MHz,
+            esp32s31 => Self::_320MHz,
+            _ => Self::_240MHz,
         }
     }
 }
@@ -335,7 +323,8 @@ impl RtcClock {
         // Make sure we measure the crystal.
         cfg_select! {
             soc_has_clock_node_timg_function_clock => {
-                let current_function_clock = clocks::TimgInstance::Timg0.function_clock_config(clocks);
+                let current_function_clock =
+                    clocks::TimgInstance::Timg0.function_clock_config(clocks);
                 clocks::TimgInstance::Timg0.configure_function_clock(clocks, function_clock);
                 clocks::TimgInstance::Timg0.request_function_clock(clocks);
             }
diff --git a/esp-hal/src/debugger.rs b/esp-hal/src/debugger.rs
index a4a2a136907..da0b1b79d42 100644
--- a/esp-hal/src/debugger.rs
+++ b/esp-hal/src/debugger.rs
@@ -3,20 +3,14 @@
 /// Checks if a debugger is connected.
 pub fn debugger_connected() -> bool {
     cfg_select! {
-        xtensa => {
-            xtensa_lx::is_debugger_attached()
-        }
-        all(riscv, soc_has_assist_debug) => {
-            crate::peripherals::ASSIST_DEBUG::regs()
-                .cpu(0)
-                .debug_mode()
-                .read()
-                .debug_module_active()
-                .bit_is_set()
-        }
-        _ => {
-            false
-        }
+        xtensa => xtensa_lx::is_debugger_attached(),
+        all(riscv, soc_has_assist_debug) => crate::peripherals::ASSIST_DEBUG::regs()
+            .cpu(0)
+            .debug_mode()
+            .read()
+            .debug_module_active()
+            .bit_is_set(),
+        _ => false,
     }
 }
 
@@ -50,9 +44,9 @@ pub unsafe fn set_stack_watchpoint(addr: usize) {
                     );
                 }
             }
-            _ => {
-                unsafe { set_watchpoint(0, addr, 4); }
-            }
+            _ => unsafe {
+                set_watchpoint(0, addr, 4);
+            },
         }
     }
 }
diff --git a/esp-hal/src/dma/aligned.rs b/esp-hal/src/dma/aligned.rs
index fc939171164..e332f43dd57 100644
--- a/esp-hal/src/dma/aligned.rs
+++ b/esp-hal/src/dma/aligned.rs
@@ -85,11 +85,13 @@ pub(crate) fn region_dma_alignment(addr: usize) -> Option<usize> {
     #[cfg(dma_can_access_psram)]
     if is_valid_psram_address(addr) {
         return Some(cfg_select! {
-            // TODO(esp32p4): PSRAM is cached through the L2 cache, whose line size is
-            // configurable (64 or 128 bytes) and is not encoded anywhere yet. Assume the
-            // larger, always-safe value until the L2 line size is available.
+            // TODO(esp32p4): PSRAM is cached through the L2 cache,
+            // whose line size is configurable (64 or 128
+            // bytes) and is not encoded anywhere yet. Assume the
+            // larger, always-safe value until the L2 line size is
+            // available.
             soc_internal_memory_cached => 128,
-            any(esp32, esp32c5, esp32c61) => 32, // TODO: fixed 32-bytes, metadata-ify
+            any(esp32, esp32c5, esp32c61) => 32, /* TODO: fixed 32-bytes, metadata-ify */
             _ => crate::soc::CONFIG_DATA_CACHE_LINE_SIZE,
         });
     }
diff --git a/esp-hal/src/dma/buffers/mod.rs b/esp-hal/src/dma/buffers/mod.rs
index 3684c5821e5..a0e0c4d0230 100644
--- a/esp-hal/src/dma/buffers/mod.rs
+++ b/esp-hal/src/dma/buffers/mod.rs
@@ -325,7 +325,10 @@ impl BurstConfig {
             dma_can_access_psram => {
                 let mut alignment = alignment;
                 if is_valid_psram_address(_buffer.as_ptr() as usize) {
-                    alignment = max(alignment, self.external_memory.min_psram_alignment(direction));
+                    alignment = max(
+                        alignment,
+                        self.external_memory.min_psram_alignment(direction),
+                    );
                 }
             }
             _ => {}
@@ -1997,15 +2000,13 @@ pub(crate) unsafe fn prepare_for_rx(
     let data_len = if data_in_psram {
         cfg_select! {
             dma_can_access_psram => {
-                // This could use a better API, but right now we'll have to build the descriptor list by
-                // hand.
-                let consumed_bytes = build_descriptor_list_for_psram(
-                    &mut descriptors,
-                    align_buffers,
-                    data,
-                );
+                // This could use a better API, but right now we'll have to build the descriptor
+                // list by hand.
+                let consumed_bytes =
+                    build_descriptor_list_for_psram(&mut descriptors, align_buffers, data);
 
-                // Invalidate data written by the DMA. As this likely affects more data than we touched, write back first.
+                // Invalidate data written by the DMA. As this likely affects more data than we
+                // touched, write back first.
                 unsafe {
                     crate::soc::cache_writeback_addr(data_addr as u32, consumed_bytes as u32);
                     crate::soc::cache_invalidate_addr(data_addr as u32, consumed_bytes as u32);
diff --git a/esp-hal/src/dma/engine/axi_gdma.rs b/esp-hal/src/dma/engine/axi_gdma.rs
index 96d4e3c66f5..9a4c971acde 100644
--- a/esp-hal/src/dma/engine/axi_gdma.rs
+++ b/esp-hal/src/dma/engine/axi_gdma.rs
@@ -559,7 +559,7 @@ fn init_axi_dma_racey() {
                 .write(|w| unsafe { w.access_extr_mem_start_addr().bits(0x4000_0000) });
             regs.extr_mem_end_addr()
                 .write(|w| unsafe { w.access_extr_mem_end_addr().bits(0x53FF_FFFF) });
-        },
+        }
         _ => {
             regs.intr_mem_start_addr()
                 .write(|w| unsafe { w.access_intr_mem_start_addr().bits(0x4FC0_0000) });
diff --git a/esp-hal/src/dma/engine/gdma/ahb_v1.rs b/esp-hal/src/dma/engine/gdma/ahb_v1.rs
index e93c3f106fa..f2df261fb69 100644
--- a/esp-hal/src/dma/engine/gdma/ahb_v1.rs
+++ b/esp-hal/src/dma/engine/gdma/ahb_v1.rs
@@ -113,12 +113,18 @@ impl RegisterAccess for AhbGdmaTxChannel<'_> {
 impl TxRegisterAccess for AhbGdmaTxChannel<'_> {
     fn is_fifo_empty(&self) -> bool {
         cfg_select! {
-            esp32s3 => {
-                 self.ch().outfifo_status().read().outfifo_empty_l3().bit_is_set()
-            }
-            _ => {
-                 self.ch().outfifo_status().read().outfifo_empty().bit_is_set()
-            }
+            esp32s3 => self
+                .ch()
+                .outfifo_status()
+                .read()
+                .outfifo_empty_l3()
+                .bit_is_set(),
+            _ => self
+                .ch()
+                .outfifo_status()
+                .read()
+                .outfifo_empty()
+                .bit_is_set(),
         }
     }
 
@@ -220,12 +226,12 @@ impl InterruptAccess<DmaTxInterrupt> for AhbGdmaTxChannel<'_> {
 
     fn is_async(&self) -> bool {
         cfg_select! {
-            any(esp32c2, esp32c3) => {
-                self.0.state.tx_is_async.load(portable_atomic::Ordering::Acquire)
-            }
-            _ => {
-                true
-            }
+            any(esp32c2, esp32c3) => self
+                .0
+                .state
+                .tx_is_async
+                .load(portable_atomic::Ordering::Acquire),
+            _ => true,
         }
     }
 
@@ -447,12 +453,12 @@ impl InterruptAccess<DmaRxInterrupt> for AhbGdmaRxChannel<'_> {
 
     fn is_async(&self) -> bool {
         cfg_select! {
-            any(esp32c2, esp32c3) => {
-                self.0.state.rx_is_async.load(portable_atomic::Ordering::Acquire)
-            }
-            _ => {
-                true
-            }
+            any(esp32c2, esp32c3) => self
+                .0
+                .state
+                .rx_is_async
+                .load(portable_atomic::Ordering::Acquire),
+            _ => true,
         }
     }
 
diff --git a/esp-hal/src/dma/engine/i2s.rs b/esp-hal/src/dma/engine/i2s.rs
index 2cae379eb8f..0148a124fe5 100644
--- a/esp-hal/src/dma/engine/i2s.rs
+++ b/esp-hal/src/dma/engine/i2s.rs
@@ -149,12 +149,8 @@ impl RegisterAccess for I2sDmaTxChannel<'_> {
 impl TxRegisterAccess for I2sDmaTxChannel<'_> {
     fn is_fifo_empty(&self) -> bool {
         cfg_select! {
-            esp32 => {
-                self.regs().lc_state0().read().bits() & 0x80000000 != 0
-            }
-            _ => {
-                self.regs().lc_state0().read().out_empty().bit_is_set()
-            }
+            esp32 => self.regs().lc_state0().read().bits() & 0x80000000 != 0,
+            _ => self.regs().lc_state0().read().out_empty().bit_is_set(),
         }
     }
 
diff --git a/esp-hal/src/dma/engine/spi.rs b/esp-hal/src/dma/engine/spi.rs
index 8c8a3487c37..2936f145380 100644
--- a/esp-hal/src/dma/engine/spi.rs
+++ b/esp-hal/src/dma/engine/spi.rs
@@ -161,12 +161,13 @@ impl RegisterAccess for SpiDmaTxChannel<'_> {
 impl TxRegisterAccess for SpiDmaTxChannel<'_> {
     fn is_fifo_empty(&self) -> bool {
         cfg_select! {
-            esp32 => {
-                self.regs().dma_rstatus().read().dma_out_status().bits() & 0x80000000 != 0
-            }
-            _ => {
-                self.regs().dma_outstatus().read().dma_outfifo_empty().bit_is_set()
-            }
+            esp32 => self.regs().dma_rstatus().read().dma_out_status().bits() & 0x80000000 != 0,
+            _ => self
+                .regs()
+                .dma_outstatus()
+                .read()
+                .dma_outfifo_empty()
+                .bit_is_set(),
         }
     }
 
diff --git a/esp-hal/src/ecc.rs b/esp-hal/src/ecc.rs
index 4cb753d441a..bb672e73183 100644
--- a/esp-hal/src/ecc.rs
+++ b/esp-hal/src/ecc.rs
@@ -619,34 +619,22 @@ impl Info {
 
     fn qx_mem(&self) -> *mut u32 {
         cfg_select! {
-            ecc_separate_jacobian_point_memory => {
-                self.regs.qx_mem(0).as_ptr()
-            }
-            _ => {
-                self.regs.px_mem(0).as_ptr()
-            }
+            ecc_separate_jacobian_point_memory => self.regs.qx_mem(0).as_ptr(),
+            _ => self.regs.px_mem(0).as_ptr(),
         }
     }
 
     fn qy_mem(&self) -> *mut u32 {
         cfg_select! {
-            ecc_separate_jacobian_point_memory => {
-                self.regs.qy_mem(0).as_ptr()
-            }
-            _ => {
-                self.regs.py_mem(0).as_ptr()
-            }
+            ecc_separate_jacobian_point_memory => self.regs.qy_mem(0).as_ptr(),
+            _ => self.regs.py_mem(0).as_ptr(),
         }
     }
 
     fn qz_mem(&self) -> *mut u32 {
         cfg_select! {
-            ecc_separate_jacobian_point_memory => {
-                self.regs.qz_mem(0).as_ptr()
-            }
-            _ => {
-                self.regs.k_mem(0).as_ptr()
-            }
+            ecc_separate_jacobian_point_memory => self.regs.qz_mem(0).as_ptr(),
+            _ => self.regs.k_mem(0).as_ptr(),
         }
     }
 
diff --git a/esp-hal/src/ethernet/mod.rs b/esp-hal/src/ethernet/mod.rs
index 428e7716f42..56bc39feea1 100644
--- a/esp-hal/src/ethernet/mod.rs
+++ b/esp-hal/src/ethernet/mod.rs
@@ -232,17 +232,17 @@ cfg_select! {
     }
     _ => {
         emac_pin!(MiiTxClk, "MII TX clock pin");
-        emac_pin!(MiiTxEn,  "MII TX enable pin");
-        emac_pin!(MiiTxd0,  "MII TXD0 pin");
-        emac_pin!(MiiTxd1,  "MII TXD1 pin");
-        emac_pin!(MiiTxd2,  "MII TXD2 pin");
-        emac_pin!(MiiTxd3,  "MII TXD3 pin");
+        emac_pin!(MiiTxEn, "MII TX enable pin");
+        emac_pin!(MiiTxd0, "MII TXD0 pin");
+        emac_pin!(MiiTxd1, "MII TXD1 pin");
+        emac_pin!(MiiTxd2, "MII TXD2 pin");
+        emac_pin!(MiiTxd3, "MII TXD3 pin");
         emac_pin!(MiiRxClk, "MII RX clock pin");
-        emac_pin!(MiiRxDv,  "MII RX data valid pin");
-        emac_pin!(MiiRxd0,  "MII RXD0 pin");
-        emac_pin!(MiiRxd1,  "MII RXD1 pin");
-        emac_pin!(MiiRxd2,  "MII RXD2 pin");
-        emac_pin!(MiiRxd3,  "MII RXD3 pin");
+        emac_pin!(MiiRxDv, "MII RX data valid pin");
+        emac_pin!(MiiRxd0, "MII RXD0 pin");
+        emac_pin!(MiiRxd1, "MII RXD1 pin");
+        emac_pin!(MiiRxd2, "MII RXD2 pin");
+        emac_pin!(MiiRxd3, "MII RXD3 pin");
 
         for_each_iomux_function! {
             (EMAC_TX_CLK, $gpio:ident, $af:ident) => {
diff --git a/esp-hal/src/i2c/master/low_level/mod.rs b/esp-hal/src/i2c/master/low_level/mod.rs
index 511e0d80391..f514d23beb9 100644
--- a/esp-hal/src/i2c/master/low_level/mod.rs
+++ b/esp-hal/src/i2c/master/low_level/mod.rs
@@ -1913,9 +1913,7 @@ fn estimate_ack_failed_reason(_register_block: &RegisterBlock) -> AcknowledgeChe
                 AcknowledgeCheckFailedReason::Data
             }
         }
-        _ => {
-            AcknowledgeCheckFailedReason::Unknown
-        }
+        _ => AcknowledgeCheckFailedReason::Unknown,
     }
 }
 
diff --git a/esp-hal/src/i2s/pdm/regs_v2.rs b/esp-hal/src/i2s/pdm/regs_v2.rs
index 864b05e5b53..f8edd38f082 100644
--- a/esp-hal/src/i2s/pdm/regs_v2.rs
+++ b/esp-hal/src/i2s/pdm/regs_v2.rs
@@ -106,7 +106,9 @@ fn configure_tx(i2s: &Info, config: &super::PdmTxConfig) -> Result<(), PdmError>
             // MCLK mux is configured in `hp_sys_clkrst::set_tx_clock` via `Info::peripheral`.
         }
         _ => {
-            i2s.regs().rx_clkm_conf().modify(|_, w| w.mclk_sel().clear_bit());
+            i2s.regs()
+                .rx_clkm_conf()
+                .modify(|_, w| w.mclk_sel().clear_bit());
         }
     }
 
@@ -197,7 +199,9 @@ fn configure_rx(i2s: &Info, config: &super::PdmRxConfig) -> Result<(), PdmError>
             // MCLK mux is configured in `hp_sys_clkrst::set_rx_clock` via `Info::peripheral`.
         }
         _ => {
-            i2s.regs().rx_clkm_conf().modify(|_, w| w.mclk_sel().set_bit());
+            i2s.regs()
+                .rx_clkm_conf()
+                .modify(|_, w| w.mclk_sel().set_bit());
         }
     }
 
diff --git a/esp-hal/src/interrupt/mod.rs b/esp-hal/src/interrupt/mod.rs
index f5671738a80..78803ba7300 100644
--- a/esp-hal/src/interrupt/mod.rs
+++ b/esp-hal/src/interrupt/mod.rs
@@ -49,8 +49,7 @@ use crate::{peripherals::Interrupt, system::Cpu};
 
 cfg_select! {
     esp32 => {
-        use crate::peripherals::DPORT as INTERRUPT_CORE0;
-        use crate::peripherals::DPORT as INTERRUPT_CORE1;
+        use crate::peripherals::{DPORT as INTERRUPT_CORE0, DPORT as INTERRUPT_CORE1};
     }
     _ => {
         use crate::peripherals::INTERRUPT_CORE0;
@@ -217,7 +216,10 @@ impl InterruptStatus {
                             return INTERRUPT_CORE0::regs().core_0_intr_status5().read().bits()
                                 & 0x1ff;
                         }
-                        INTERRUPT_CORE0::regs().core_0_intr_status(word).read().bits()
+                        INTERRUPT_CORE0::regs()
+                            .core_0_intr_status(word)
+                            .read()
+                            .bits()
                     }
                     esp32p4 => {
                         if word == 4 {
@@ -229,12 +231,10 @@ impl InterruptStatus {
                             .read()
                             .bits()
                     }
-                    _ => {
-                        INTERRUPT_CORE0::regs()
-                            .core_0_intr_status(word)
-                            .read()
-                            .bits()
-                    }
+                    _ => INTERRUPT_CORE0::regs()
+                        .core_0_intr_status(word)
+                        .read()
+                        .bits(),
                 }
             }
             #[cfg(multi_core)]
@@ -246,7 +246,10 @@ impl InterruptStatus {
                             return INTERRUPT_CORE1::regs().core_1_intr_status5().read().bits()
                                 & 0x1ff;
                         }
-                        INTERRUPT_CORE1::regs().core_1_intr_status(word).read().bits()
+                        INTERRUPT_CORE1::regs()
+                            .core_1_intr_status(word)
+                            .read()
+                            .bits()
                     }
                     esp32p4 => {
                         if word == 4 {
@@ -258,12 +261,10 @@ impl InterruptStatus {
                             .read()
                             .bits()
                     }
-                    _ => {
-                        INTERRUPT_CORE1::regs()
-                            .core_1_intr_status(word)
-                            .read()
-                            .bits()
-                    }
+                    _ => INTERRUPT_CORE1::regs()
+                        .core_1_intr_status(word)
+                        .read()
+                        .bits(),
                 }
             }
         }
@@ -339,12 +340,12 @@ fn vector_entry(interrupt: Interrupt) -> &'static pac::Vector {
     // Interrupt enum, which is generated from the list of valid peripheral interrupts in the PAC.
     unsafe {
         cfg_select! {
-            xtensa => {
-                (&__INTERRUPTS as *const pac::Vector).add(interrupt as usize).as_ref_unchecked()
-            },
-            riscv => {
-                (&__EXTERNAL_INTERRUPTS as *const pac::Vector).add(interrupt as usize).as_ref_unchecked()
-            },
+            xtensa => (&__INTERRUPTS as *const pac::Vector)
+                .add(interrupt as usize)
+                .as_ref_unchecked(),
+            riscv => (&__EXTERNAL_INTERRUPTS as *const pac::Vector)
+                .add(interrupt as usize)
+                .as_ref_unchecked(),
             _ => {
                 compile_error!("Unsupported architecture");
             }
diff --git a/esp-hal/src/interrupt/riscv.rs b/esp-hal/src/interrupt/riscv.rs
index 60b3df77123..ed0fe90be6a 100644
--- a/esp-hal/src/interrupt/riscv.rs
+++ b/esp-hal/src/interrupt/riscv.rs
@@ -418,19 +418,21 @@ pub(crate) unsafe fn change_current_runlevel(level: RunLevel) -> RunLevel {
 
 fn cpu_wait_mode_on() -> bool {
     cfg_select! {
-        soc_has_pcr => {
-            crate::peripherals::PCR::regs().cpu_waiti_conf().read().cpu_wait_mode_force_on().bit_is_set()
-        }
-        soc_has_hp_sys => {
-            crate::peripherals::HP_SYS::regs().cpu_waiti_conf().read().cpu_wait_mode_force_on().bit_is_set()
-        }
-        _ => {
-            crate::peripherals::SYSTEM::regs()
-                .cpu_per_conf()
-                .read()
-                .cpu_wait_mode_force_on()
-                .bit_is_set()
-        }
+        soc_has_pcr => crate::peripherals::PCR::regs()
+            .cpu_waiti_conf()
+            .read()
+            .cpu_wait_mode_force_on()
+            .bit_is_set(),
+        soc_has_hp_sys => crate::peripherals::HP_SYS::regs()
+            .cpu_waiti_conf()
+            .read()
+            .cpu_wait_mode_force_on()
+            .bit_is_set(),
+        _ => crate::peripherals::SYSTEM::regs()
+            .cpu_per_conf()
+            .read()
+            .cpu_wait_mode_force_on()
+            .bit_is_set(),
     }
 }
 
@@ -604,9 +606,12 @@ pub(crate) mod rt {
                 let mcause = riscv::register::mcause::read();
             }
             _ => {
-                // Change the current runlevel so that interrupt handlers can access the correct runlevel.
+                // Change the current runlevel so that interrupt handlers can access the correct
+                // runlevel.
                 let prio = unwrap!(INTERRUPT_TO_PRIORITY[cpu_intr as usize]);
-                let level = unsafe { change_current_runlevel(RunLevel::Interrupt(ElevatedRunLevel::from(prio))) };
+                let level = unsafe {
+                    change_current_runlevel(RunLevel::Interrupt(ElevatedRunLevel::from(prio)))
+                };
                 let prio = prio as u8;
             }
         }
@@ -639,9 +644,7 @@ pub(crate) mod rt {
                 // since it contains the former CPU priority. When executing `mret`,
                 // the hardware will restore the former threshold, from `mcause` to
                 // `mintstatus` CSR
-                unsafe {
-                    core::arch::asm!("csrw 0x342, {}", in(reg) mcause.bits())
-                }
+                unsafe { core::arch::asm!("csrw 0x342, {}", in(reg) mcause.bits()) }
             }
             _ => {
                 unsafe { change_current_runlevel(level) };
diff --git a/esp-hal/src/interrupt/software.rs b/esp-hal/src/interrupt/software.rs
index d760c9ebecb..3154cab25ea 100644
--- a/esp-hal/src/interrupt/software.rs
+++ b/esp-hal/src/interrupt/software.rs
@@ -120,7 +120,7 @@ impl<const NUM: u8> SoftwareInterrupt<'_, NUM> {
                 reg.write(|w| w.cpu_intr().set_bit());
                 // Read back to ensure the write is completed.
                 _ = reg.read();
-            },
+            }
             _ => {
                 crate::interrupt::free(|| {
                     reg.write(|w| w.cpu_intr().set_bit());
diff --git a/esp-hal/src/interrupt/xtensa.rs b/esp-hal/src/interrupt/xtensa.rs
index d10c9d96c70..d5a6fbc694f 100644
--- a/esp-hal/src/interrupt/xtensa.rs
+++ b/esp-hal/src/interrupt/xtensa.rs
@@ -588,9 +588,7 @@ pub(crate) mod rt {
             all(feature = "rt", feature = "exception-handler", stack_guard_monitoring) => {
                 crate::exception_handler::breakpoint_interrupt(save_frame);
             }
-            _ => {
-                unsafe { level6_interrupt(save_frame) }
-            }
+            _ => unsafe { level6_interrupt(save_frame) },
         }
     }
 
diff --git a/esp-hal/src/parl_io.rs b/esp-hal/src/parl_io.rs
index 41ec970d190..1a594c7f873 100644
--- a/esp-hal/src/parl_io.rs
+++ b/esp-hal/src/parl_io.rs
@@ -1926,12 +1926,8 @@ mod private {
 
         pub fn tx_valid_pin_signal() -> OutputSignal {
             cfg_select! {
-                esp32c5 => {
-                    OutputSignal::PARL_TX_CS
-                }
-                _ => {
-                    OutputSignal::PARL_TX_DATA7
-                }
+                esp32c5 => OutputSignal::PARL_TX_CS,
+                _ => OutputSignal::PARL_TX_DATA7,
             }
         }
 
diff --git a/esp-hal/src/peripherals/mod.rs b/esp-hal/src/peripherals/mod.rs
index 9689480d2d0..68bfedc5dce 100644
--- a/esp-hal/src/peripherals/mod.rs
+++ b/esp-hal/src/peripherals/mod.rs
@@ -158,7 +158,7 @@ macro_rules! create_peripheral {
             #[doc = r"Return a reference to the register block"]
             #[inline(always)]
             #[instability::unstable]
-            pub const fn regs<'a>() -> &'a <pac::$base as core::ops::Deref>::Target {
+            pub fn regs<'a>() -> &'a <pac::$base as core::ops::Deref>::Target {
                 unsafe { &*Self::PTR }
             }
 
diff --git a/esp-hal/src/rng/ll.rs b/esp-hal/src/rng/ll.rs
index 93425065b1b..bd42e59afd5 100644
--- a/esp-hal/src/rng/ll.rs
+++ b/esp-hal/src/rng/ll.rs
@@ -12,9 +12,7 @@ fn tee_enabled() -> bool {
 #[inline]
 fn current_cpu_cycles() -> usize {
     cfg_select! {
-        xtensa => {
-            xtensa_lx::timer::get_cycle_count() as usize
-        }
+        xtensa => xtensa_lx::timer::get_cycle_count() as usize,
         soc_cpu_has_csr_pc => {
             const PRV_M: usize = 3;
             macro_rules! read_csr_fn {
@@ -51,9 +49,7 @@ fn current_cpu_cycles() -> usize {
                 read_pccr_user()
             }
         }
-        _ => {
-            riscv::register::mcycle::read()
-        }
+        _ => riscv::register::mcycle::read(),
     }
 }
 
@@ -67,15 +63,9 @@ fn read_one(wait_cycles: usize) -> u32 {
                 *last_wait_start = now;
 
                 cfg_select! {
-                    rng_is_lp_sys => {
-                        Some(RNG::regs().rng_data().read().bits())
-                    }
-                    esp32s31 => {
-                        Some(RNG::regs().crc_sync_data().read().bits())
-                    }
-                    _ => {
-                        Some(RNG::regs().data().read().bits())
-                    }
+                    rng_is_lp_sys => Some(RNG::regs().rng_data().read().bits()),
+                    esp32s31 => Some(RNG::regs().crc_sync_data().read().bits()),
+                    _ => Some(RNG::regs().data().read().bits()),
                 }
             } else {
                 None
diff --git a/esp-hal/src/rsa/mod.rs b/esp-hal/src/rsa/mod.rs
index 9d2ac1d6095..4f1ebf01236 100644
--- a/esp-hal/src/rsa/mod.rs
+++ b/esp-hal/src/rsa/mod.rs
@@ -633,12 +633,8 @@ impl<'a, 'd> RsaFuture<'a, 'd> {
 
     fn is_done(&self) -> bool {
         cfg_select! {
-            rsa_version = "1" => {
-                SIGNALED.load(Ordering::Acquire)
-            }
-            _ => {
-                self.driver.is_idle()
-            }
+            rsa_version = "1" => SIGNALED.load(Ordering::Acquire),
+            _ => self.driver.is_idle(),
         }
     }
 }
diff --git a/esp-hal/src/rtc_cntl/mod.rs b/esp-hal/src/rtc_cntl/mod.rs
index ac6d719da20..4c0bbdd44d4 100644
--- a/esp-hal/src/rtc_cntl/mod.rs
+++ b/esp-hal/src/rtc_cntl/mod.rs
@@ -139,17 +139,13 @@ pub(crate) mod rtc;
 
 cfg_select! {
     esp32s31 => {
-        use crate::peripherals::LP_SYS as LP_AON;
-        use crate::peripherals::LP_WDT;
+        use crate::peripherals::{LP_SYS as LP_AON, LP_WDT};
     }
     soc_has_lp_wdt => {
-        use crate::peripherals::LP_WDT;
-        use crate::peripherals::LP_AON;
+        use crate::peripherals::{LP_AON, LP_WDT};
     }
     _ => {
-        use crate::peripherals::LPWR;
-        use crate::peripherals::LPWR as LP_WDT;
-        use crate::peripherals::LPWR as LP_AON;
+        use crate::peripherals::{LPWR, LPWR as LP_WDT, LPWR as LP_AON};
     }
 }
 
@@ -262,11 +258,7 @@ impl<'d> Rtc<'d> {
             any(esp32, esp32s2, esp32s3, esp32c2, esp32c3) => {
                 // Keep update high for at least one RTC slowclk period, assumes 150k RTC_SLOWCLK
                 // Without this, this function may return a stale value
-                const UPDATE_COUNT: usize = if cfg!(esp32) {
-                    20
-                } else {
-                    10
-                };
+                const UPDATE_COUNT: usize = if cfg!(esp32) { 20 } else { 10 };
                 for _ in 0..UPDATE_COUNT {
                     rtc.time_update().write(|w| w.time_update().set_bit());
                     crate::rom::ets_delay_us(1);
@@ -314,11 +306,12 @@ impl<'d> Rtc<'d> {
     #[cfg(lp_timer_driver_supported)]
     fn boot_time_us(&self) -> u64 {
         // For more info on about how RTC setting works and what it has to do with boot time, see https://github.com/esp-rs/esp-hal/pull/1883
-        let (low_reg, high_reg) = cfg_select! {
-            esp32s31 => (LP_AON::regs().lp_store(2), LP_AON::regs().lp_store(3)),
-            esp32p4 => (LP_AON::regs().lp_store2(), LP_AON::regs().lp_store3()),
-            _ => (LP_AON::regs().store2(), LP_AON::regs().store3()),
-        };
+        let (low_reg, high_reg) =
+            cfg_select! {
+                esp32s31 => (LP_AON::regs().lp_store(2), LP_AON::regs().lp_store(3)),
+                esp32p4 => (LP_AON::regs().lp_store2(), LP_AON::regs().lp_store3()),
+                _ => (LP_AON::regs().store2(), LP_AON::regs().store3()),
+            };
 
         let l = low_reg.read().bits() as u64;
         let h = high_reg.read().bits() as u64;
@@ -333,11 +326,12 @@ impl<'d> Rtc<'d> {
         // Please see `boot_time_us` for documentation on registers and peripherals
         // used for certain SOCs.
 
-        let (low_reg, high_reg) = cfg_select! {
-            esp32s31 => (LP_AON::regs().lp_store(2), LP_AON::regs().lp_store(3)),
-            esp32p4 => (LP_AON::regs().lp_store2(), LP_AON::regs().lp_store3()),
-            _ => (LP_AON::regs().store2(), LP_AON::regs().store3()),
-        };
+        let (low_reg, high_reg) =
+            cfg_select! {
+                esp32s31 => (LP_AON::regs().lp_store(2), LP_AON::regs().lp_store(3)),
+                esp32p4 => (LP_AON::regs().lp_store2(), LP_AON::regs().lp_store3()),
+                _ => (LP_AON::regs().store2(), LP_AON::regs().store3()),
+            };
 
         // https://github.com/espressif/esp-idf/blob/23e4823/components/newlib/port/esp_time_impl.c#L102-L103
 
@@ -426,7 +420,9 @@ impl<'d> Rtc<'d> {
             _ => LP_AON::regs().store4(),
         };
         let disable_mask = cfg_select! {
-            any(esp32p4, esp32s31) => Self::RTC_DISABLE_ROM_LOG | (Self::RTC_DISABLE_ROM_LOG << 16),
+            any(esp32p4, esp32s31) => {
+                Self::RTC_DISABLE_ROM_LOG | (Self::RTC_DISABLE_ROM_LOG << 16)
+            }
             _ => Self::RTC_DISABLE_ROM_LOG,
         };
         reg.modify(|r, w| unsafe { w.bits(r.bits() | disable_mask) });
@@ -812,10 +808,7 @@ impl WakeLock {
     #[instability::unstable]
     pub fn is_active() -> bool {
         cfg_select! {
-            sleep_light_sleep => {
-                wake_lock_count().load(portable_atomic::Ordering::Acquire)
-                    != 0
-            }
+            sleep_light_sleep => wake_lock_count().load(portable_atomic::Ordering::Acquire) != 0,
             _ => true,
         }
     }
diff --git a/esp-hal/src/sha.rs b/esp-hal/src/sha.rs
index 23910b540cf..899454bd3b7 100644
--- a/esp-hal/src/sha.rs
+++ b/esp-hal/src/sha.rs
@@ -631,9 +631,15 @@ impl ShaAlgorithmKind {
             esp32 => {
                 match self {
                     ShaAlgorithmKind::Sha1 => regs.sha1_start().write(|w| w.sha1_start().set_bit()),
-                    ShaAlgorithmKind::Sha256 => regs.sha256_start().write(|w| w.sha256_start().set_bit()),
-                    ShaAlgorithmKind::Sha384 => regs.sha384_start().write(|w| w.sha384_start().set_bit()),
-                    ShaAlgorithmKind::Sha512 => regs.sha512_start().write(|w| w.sha512_start().set_bit()),
+                    ShaAlgorithmKind::Sha256 => {
+                        regs.sha256_start().write(|w| w.sha256_start().set_bit())
+                    }
+                    ShaAlgorithmKind::Sha384 => {
+                        regs.sha384_start().write(|w| w.sha384_start().set_bit())
+                    }
+                    ShaAlgorithmKind::Sha512 => {
+                        regs.sha512_start().write(|w| w.sha512_start().set_bit())
+                    }
                 };
             }
             _ => {
@@ -647,10 +653,18 @@ impl ShaAlgorithmKind {
         cfg_select! {
             esp32 => {
                 match self {
-                    ShaAlgorithmKind::Sha1 => regs.sha1_continue().write(|w| w.sha1_continue().set_bit()),
-                    ShaAlgorithmKind::Sha256 => regs.sha256_continue().write(|w| w.sha256_continue().set_bit()),
-                    ShaAlgorithmKind::Sha384 => regs.sha384_continue().write(|w| w.sha384_continue().set_bit()),
-                    ShaAlgorithmKind::Sha512 => regs.sha512_continue().write(|w| w.sha512_continue().set_bit()),
+                    ShaAlgorithmKind::Sha1 => {
+                        regs.sha1_continue().write(|w| w.sha1_continue().set_bit())
+                    }
+                    ShaAlgorithmKind::Sha256 => regs
+                        .sha256_continue()
+                        .write(|w| w.sha256_continue().set_bit()),
+                    ShaAlgorithmKind::Sha384 => regs
+                        .sha384_continue()
+                        .write(|w| w.sha384_continue().set_bit()),
+                    ShaAlgorithmKind::Sha512 => regs
+                        .sha512_continue()
+                        .write(|w| w.sha512_continue().set_bit()),
                 };
             }
             _ => {
@@ -668,9 +682,15 @@ impl ShaAlgorithmKind {
                 let regs = _sha.register_block();
                 match self {
                     ShaAlgorithmKind::Sha1 => regs.sha1_load().write(|w| w.sha1_load().set_bit()),
-                    ShaAlgorithmKind::Sha256 => regs.sha256_load().write(|w| w.sha256_load().set_bit()),
-                    ShaAlgorithmKind::Sha384 => regs.sha384_load().write(|w| w.sha384_load().set_bit()),
-                    ShaAlgorithmKind::Sha512 => regs.sha512_load().write(|w| w.sha512_load().set_bit()),
+                    ShaAlgorithmKind::Sha256 => {
+                        regs.sha256_load().write(|w| w.sha256_load().set_bit())
+                    }
+                    ShaAlgorithmKind::Sha384 => {
+                        regs.sha384_load().write(|w| w.sha384_load().set_bit())
+                    }
+                    ShaAlgorithmKind::Sha512 => {
+                        regs.sha512_load().write(|w| w.sha512_load().set_bit())
+                    }
                 };
 
                 true
@@ -737,24 +757,16 @@ for_each_sha_algorithm! {
 fn h_mem(sha: &crate::peripherals::SHA<'_>, index: usize) -> *mut u32 {
     let sha = sha.register_block();
     cfg_select! {
-        esp32 => {
-            sha.text(index).as_ptr()
-        }
-        _ => {
-            sha.h_mem(index).as_ptr()
-        }
+        esp32 => sha.text(index).as_ptr(),
+        _ => sha.h_mem(index).as_ptr(),
     }
 }
 
 fn m_mem(sha: &crate::peripherals::SHA<'_>, index: usize) -> *mut u32 {
     let sha = sha.register_block();
     cfg_select! {
-        esp32 => {
-            sha.text(index).as_ptr()
-        }
-        _ => {
-            sha.m_mem(index).as_ptr()
-        }
+        esp32 => sha.text(index).as_ptr(),
+        _ => sha.m_mem(index).as_ptr(),
     }
 }
 
diff --git a/esp-hal/src/soc/esp32s2/mod.rs b/esp-hal/src/soc/esp32s2/mod.rs
index 9271f4d987f..fca753435d8 100644
--- a/esp-hal/src/soc/esp32s2/mod.rs
+++ b/esp-hal/src/soc/esp32s2/mod.rs
@@ -66,11 +66,12 @@ pub(crate) const CONFIG_INSTRUCTION_CACHE_SIZE: usize = cfg_select! {
     instruction_cache_size_8kb => 0,
     instruction_cache_size_16kb => 1,
 };
-pub(crate) const CONFIG_DATA_CACHE_SIZE: usize = cfg_select! {
-    data_cache_size_0kb => 0, // doesn't matter according to esp-idf
-    data_cache_size_8kb => 0,
-    data_cache_size_16kb => 1,
-};
+pub(crate) const CONFIG_DATA_CACHE_SIZE: usize =
+    cfg_select! {
+        data_cache_size_0kb => 0, // doesn't matter according to esp-idf
+        data_cache_size_8kb => 0,
+        data_cache_size_16kb => 1,
+    };
 
 #[crate::ram]
 pub(crate) unsafe fn configure_cpu_caches() {
diff --git a/esp-hal/src/soc/mod.rs b/esp-hal/src/soc/mod.rs
index 1a96231c396..7d7f5c1b6d1 100644
--- a/esp-hal/src/soc/mod.rs
+++ b/esp-hal/src/soc/mod.rs
@@ -273,12 +273,12 @@ pub(crate) fn ensure_stack_pointer_in_range() {
     }
     let current_sp: usize;
     cfg_select! {
-        xtensa => {
-            unsafe { core::arch::asm!("mov {0}, sp", out(reg) current_sp); }
-        }
-        _ => {
-            unsafe { core::arch::asm!("mv {0}, sp", out(reg) current_sp); }
-        }
+        xtensa => unsafe {
+            core::arch::asm!("mov {0}, sp", out(reg) current_sp);
+        },
+        _ => unsafe {
+            core::arch::asm!("mv {0}, sp", out(reg) current_sp);
+        },
     }
     let stack_bottom = (&raw const _stack_end_cpu0) as usize;
     let stack_top = (&raw const _stack_start_cpu0) as usize;
diff --git a/esp-hal/src/spi/master/dma.rs b/esp-hal/src/spi/master/dma.rs
index 88a542227e9..ba2aa69ac83 100644
--- a/esp-hal/src/spi/master/dma.rs
+++ b/esp-hal/src/spi/master/dma.rs
@@ -277,9 +277,7 @@ impl<'d> SpiDma<'d, Blocking> {
             all(spi_master_version = "1", spi_address_workaround) => unsafe {
                 (&mut *state.default_tx_buffer.get()).get_mut().unsize()
             },
-            _ => unsafe {
-                DmaAlignedMut::new_unchecked(&mut [][..])
-            }
+            _ => unsafe { DmaAlignedMut::new_unchecked(&mut [][..]) },
         };
 
         let rx_buffer = unwrap!(DmaRxBuf::new(rx_descriptors, unsafe {
@@ -1923,7 +1921,7 @@ impl DmaDriver {
         cfg_select! {
             any(spi_master_version = "1", spi_master_version = "2") => {
                 self.reset_dma();
-            },
+            }
             _ => {
                 self.regs().dma_conf().modify(|_, w| {
                     w.dma_tx_ena().set_bit();
@@ -1941,7 +1939,7 @@ impl DmaDriver {
                     w.in_rst().bit(bit);
                     w.ahbm_fifo_rst().bit(bit);
                     w.ahbm_rst().bit(bit)
-                },
+                }
                 _ => {
                     w.rx_afifo_rst().bit(bit);
                     w.buf_afifo_rst().bit(bit);
@@ -1966,7 +1964,7 @@ impl DmaDriver {
                     w.out_done().clear_bit_by_one();
                     w.out_eof().clear_bit_by_one();
                     w.out_total_eof().clear_bit_by_one()
-                },
+                }
                 _ => {
                     w.dma_infifo_full_err().clear_bit_by_one();
                     w.dma_outfifo_empty_err().clear_bit_by_one();
diff --git a/esp-hal/src/spi/master/low_level/mod.rs b/esp-hal/src/spi/master/low_level/mod.rs
index e49b7b803c0..5cbc011f9a7 100644
--- a/esp-hal/src/spi/master/low_level/mod.rs
+++ b/esp-hal/src/spi/master/low_level/mod.rs
@@ -972,7 +972,7 @@ for_each_spi_master! {
                 }
 
                 static INFO: Info = Info {
-                    register_block: crate::peripherals::$peri::regs(),
+                    register_block: crate::peripherals::$peri::ptr(),
                     peripheral: crate::system::Peripheral::$sys,
                     async_handler: irq_handler,
                     sclk: OutputSignal::$sclk,
diff --git a/esp-hal/src/spi/slave.rs b/esp-hal/src/spi/slave.rs
index 556eb601ded..63d07a42821 100644
--- a/esp-hal/src/spi/slave.rs
+++ b/esp-hal/src/spi/slave.rs
@@ -533,7 +533,7 @@ pub mod dma {
                         w.dma_infifo_full_clr().bit(bit);
                         w.ahbm_rst().bit(bit)
                     });
-                },
+                }
                 _ => {
                     self.regs().dma_conf().modify(|_, w| {
                         w.dma_tx_ena().set_bit();
@@ -557,7 +557,7 @@ pub mod dma {
                         w.out_done().clear_bit_by_one();
                         w.out_eof().clear_bit_by_one();
                         w.out_total_eof().clear_bit_by_one()
-                    },
+                    }
                     _ => {
                         w.dma_infifo_full_err().clear_bit_by_one();
                         w.dma_outfifo_empty_err().clear_bit_by_one();
@@ -782,12 +782,8 @@ impl Info {
     #[cfg(spi_slave_supports_dma)]
     fn is_bus_busy(&self) -> bool {
         let reg = cfg_select! {
-            any(esp32, esp32s2) => {
-                self.regs().slave()
-            },
-            _ => {
-                self.regs().dma_int_raw()
-            }
+            any(esp32, esp32s2) => self.regs().slave(),
+            _ => self.regs().dma_int_raw(),
         };
         reg.read().trans_done().bit_is_clear()
     }
@@ -800,7 +796,7 @@ impl Info {
                 self.regs()
                     .slave()
                     .modify(|_, w| w.trans_done().clear_bit());
-            },
+            }
             _ => {
                 self.regs()
                     .dma_int_clr()
@@ -824,7 +820,7 @@ for_each_spi_slave! {
             #[inline(always)]
             fn info(&self) -> &'static Info {
                 static INFO: Info = Info {
-                    register_block: crate::peripherals::$peri::regs(),
+                    register_block: crate::peripherals::$peri::ptr(),
                     peripheral: crate::system::Peripheral::$sys,
                     sclk: InputSignal::$sclk,
                     mosi: InputSignal::$mosi,
diff --git a/esp-hal/src/system.rs b/esp-hal/src/system.rs
index ec73f4667e6..e13ca7ab664 100644
--- a/esp-hal/src/system.rs
+++ b/esp-hal/src/system.rs
@@ -276,15 +276,11 @@ impl Cpu {
     #[instability::unstable]
     pub fn other() -> impl Iterator<Item = Self> {
         cfg_select! {
-            multi_core => {
-                match Self::current() {
-                    Cpu::ProCpu => [Cpu::AppCpu].into_iter(),
-                    Cpu::AppCpu => [Cpu::ProCpu].into_iter(),
-                }
-            }
-            _ => {
-                [].into_iter()
-            }
+            multi_core => match Self::current() {
+                Cpu::ProCpu => [Cpu::AppCpu].into_iter(),
+                Cpu::AppCpu => [Cpu::ProCpu].into_iter(),
+            },
+            _ => [].into_iter(),
         }
     }
 
@@ -292,12 +288,8 @@ impl Cpu {
     #[inline(always)]
     pub fn all() -> impl Iterator<Item = Self> {
         cfg_select! {
-            multi_core => {
-                [Cpu::ProCpu, Cpu::AppCpu].into_iter()
-            }
-            _ => {
-                [Cpu::ProCpu].into_iter()
-            }
+            multi_core => [Cpu::ProCpu, Cpu::AppCpu].into_iter(),
+            _ => [Cpu::ProCpu].into_iter(),
         }
     }
 }
@@ -313,15 +305,9 @@ impl Cpu {
 pub(crate) fn raw_core() -> usize {
     // This method must never return UNUSED_THREAD_ID_VALUE
     cfg_select! {
-        all(multi_core, riscv) => {
-            riscv::register::mhartid::read()
-        }
-        all(multi_core, xtensa) => {
-            (xtensa_lx::get_processor_id() & 0x2000) as usize
-        }
-        _ => {
-            0
-        }
+        all(multi_core, riscv) => riscv::register::mhartid::read(),
+        all(multi_core, xtensa) => (xtensa_lx::get_processor_id() & 0x2000) as usize,
+        _ => 0,
     }
 }
 
diff --git a/esp-hal/src/timer/systimer.rs b/esp-hal/src/timer/systimer.rs
index 6bb0b500068..4f188fda91f 100644
--- a/esp-hal/src/timer/systimer.rs
+++ b/esp-hal/src/timer/systimer.rs
@@ -203,15 +203,9 @@ impl<'d> SystemTimer<'d> {
             }
             _ => {
                 cfg_select! {
-                    esp32s2 => {
-                        crate::soc::clocks::apb_clk_frequency() as u64
-                    }
-                    esp32h2 => {
-                        (crate::soc::clocks::xtal_clk_frequency() / 2) as u64
-                    }
-                    _ => {
-                        (crate::soc::clocks::xtal_clk_frequency() * 10 / 25) as u64
-                    }
+                    esp32s2 => crate::soc::clocks::apb_clk_frequency() as u64,
+                    esp32h2 => (crate::soc::clocks::xtal_clk_frequency() / 2) as u64,
+                    _ => (crate::soc::clocks::xtal_clk_frequency() * 10 / 25) as u64,
                 }
             }
         }
diff --git a/esp-hal/src/timer/timg.rs b/esp-hal/src/timer/timg.rs
index 20a7ea94a8d..c4e2d87eb2a 100644
--- a/esp-hal/src/timer/timg.rs
+++ b/esp-hal/src/timer/timg.rs
@@ -429,7 +429,7 @@ impl Timer<'_> {
                     0 => crate::soc::clocks::TimgInstance::Timg0,
                     #[cfg(soc_has_timg1)]
                     1 => crate::soc::clocks::TimgInstance::Timg1,
-                    _ => unreachable!()
+                    _ => unreachable!(),
                 };
                 let hz = timg.function_clock_frequency();
             }
@@ -519,9 +519,7 @@ impl Timer<'_> {
                 // On ESP32 and S2, the `int_ena` register is ineffective - interrupts fire even
                 // without int_ena enabling them. We use level interrupts so that we have a status
                 // bit available.
-                self.t()
-                    .config()
-                    .modify(|_, w| w.level_int_en().bit(state));
+                self.t().config().modify(|_, w| w.level_int_en().bit(state));
             }
             timergroup_timg_has_timer1 => {
                 INT_ENA_LOCK[self.timer_group() as usize].lock(|| {
diff --git a/esp-hal/src/twai/mod.rs b/esp-hal/src/twai/mod.rs
index 7e4249474ca..7002efe9437 100644
--- a/esp-hal/src/twai/mod.rs
+++ b/esp-hal/src/twai/mod.rs
@@ -1498,23 +1498,15 @@ impl PrivateInstance for crate::peripherals::TWAI0<'_> {
 
     fn input_signal(&self) -> InputSignal {
         cfg_select! {
-            any(esp32, esp32c3, esp32s2, esp32s3) => {
-                InputSignal::TWAI_RX
-            }
-            _ => {
-                InputSignal::TWAI0_RX
-            }
+            any(esp32, esp32c3, esp32s2, esp32s3) => InputSignal::TWAI_RX,
+            _ => InputSignal::TWAI0_RX,
         }
     }
 
     fn output_signal(&self) -> OutputSignal {
         cfg_select! {
-            any(esp32, esp32c3, esp32s2, esp32s3) => {
-                OutputSignal::TWAI_TX
-            }
-            _ => {
-                OutputSignal::TWAI0_TX
-            }
+            any(esp32, esp32c3, esp32s2, esp32s3) => OutputSignal::TWAI_TX,
+            _ => OutputSignal::TWAI0_TX,
         }
     }
 
diff --git a/esp-hal/src/uart/clocks/v2_pcr.rs b/esp-hal/src/uart/clocks/v2_pcr.rs
index a87559a1fa6..327fa6a9ea1 100644
--- a/esp-hal/src/uart/clocks/v2_pcr.rs
+++ b/esp-hal/src/uart/clocks/v2_pcr.rs
@@ -42,7 +42,7 @@ impl UartInstance {
                 UartFunctionClockSclk::PllF48m => 1,
                 UartFunctionClockSclk::RcFast => 2,
                 UartFunctionClockSclk::Xtal => 3,
-            }
+            },
         };
 
         PCR::regs()
diff --git a/esp-hal/src/uart/low_level/mod.rs b/esp-hal/src/uart/low_level/mod.rs
index 3688323327c..12fd879a121 100644
--- a/esp-hal/src/uart/low_level/mod.rs
+++ b/esp-hal/src/uart/low_level/mod.rs
@@ -607,7 +607,8 @@ impl Info {
             // be applied only after validating the resulting baud rate.
             cfg_select! {
                 any(uart_has_sclk_divider, soc_has_pcr, esp32p4, esp32s31) => {
-                    const MAX_DIV: u32 = property!("clock_tree.uart.baud_rate_generator.integral").1;
+                    const MAX_DIV: u32 =
+                        property!("clock_tree.uart.baud_rate_generator.integral").1;
                     let clk_div = clk.div_ceil(MAX_DIV).div_ceil(config.baudrate);
                     debug!("SCLK: {} divider: {}", clk, clk_div);
 
diff --git a/esp-hal/src/uart/low_level/v1.rs b/esp-hal/src/uart/low_level/v1.rs
index a7054f2753e..c763fd9fe2c 100644
--- a/esp-hal/src/uart/low_level/v1.rs
+++ b/esp-hal/src/uart/low_level/v1.rs
@@ -117,7 +117,10 @@ pub(super) fn change_flow_control(
             cfg_select! {
                 esp32 => {
                     info.regs().swfc_conf().modify(|_, w| unsafe {
-                        w.xon_threshold().bits(xon_threshold).xoff_threshold().bits(xoff_threshold)
+                        w.xon_threshold()
+                            .bits(xon_threshold)
+                            .xoff_threshold()
+                            .bits(xoff_threshold)
                     });
                     info.regs().swfc_conf().modify(|_, w| unsafe {
                         w.xon_char().bits(xon_char).xoff_char().bits(xoff_char)
@@ -223,12 +226,8 @@ pub(super) fn read_next_from_fifo(info: &Info) -> u8 {
     fn access_fifo_register<R>(f: impl Fn() -> R) -> R {
         // https://docs.espressif.com/projects/esp-chip-errata/en/latest/esp32/03-errata-description/esp32/cpu-subsequent-access-halted-when-get-interrupted.html
         cfg_select! {
-            esp32 => {
-                crate::interrupt::free(f)
-            }
-            _ => {
-                f()
-            }
+            esp32 => crate::interrupt::free(f),
+            _ => f(),
         }
     }
 
@@ -237,7 +236,11 @@ pub(super) fn read_next_from_fifo(info: &Info) -> u8 {
         esp32s2 => {
             // On the ESP32-S2 we need to use PeriBus2 to read the FIFO:
             let fifo_reg = unsafe {
-                &*fifo_reg.as_ptr().cast::<u8>().add(0x20C00000).cast::<crate::pac::uart0::FIFO>()
+                &*fifo_reg
+                    .as_ptr()
+                    .cast::<u8>()
+                    .add(0x20C00000)
+                    .cast::<crate::pac::uart0::FIFO>()
             };
         }
         _ => {}
@@ -268,8 +271,6 @@ pub(super) fn rx_fifo_count(info: &Info) -> u16 {
                 0
             }
         }
-        _ => {
-            info.regs().status().read().rxfifo_cnt().bits() as u16
-        }
+        _ => info.regs().status().read().rxfifo_cnt().bits() as u16,
     }
 }
diff --git a/esp-lp-hal/src/gpio.rs b/esp-lp-hal/src/gpio.rs
index 5960ebb0514..61a91da2a91 100644
--- a/esp-lp-hal/src/gpio.rs
+++ b/esp-lp-hal/src/gpio.rs
@@ -105,15 +105,10 @@ impl<const PIN: u8> Flex<PIN> {
     /// Get the current pin input level.
     pub fn level(&self) -> Level {
         cfg_select! {
-            esp32c6 => {
-                ((unsafe { &*LpIo::PTR }.in_().read().bits() >> PIN) & 0x1 != 0).into()
-            }
-            esp32s2 => {
-                ((unsafe { &*LpIo::PTR }.in_().read().gpio_in_next().bits() >> PIN) & 0x1 != 0).into()
-            }
-            esp32s3 => {
-                ((unsafe { &*LpIo::PTR }.in_().read().next().bits() >> PIN) & 0x1 != 0).into()
-            }
+            esp32c6 => ((unsafe { &*LpIo::PTR }.in_().read().bits() >> PIN) & 0x1 != 0).into(),
+            esp32s2 => ((unsafe { &*LpIo::PTR }.in_().read().gpio_in_next().bits() >> PIN) & 0x1 != 0)
+                .into(),
+            esp32s3 => ((unsafe { &*LpIo::PTR }.in_().read().next().bits() >> PIN) & 0x1 != 0).into(),
             _ => {}
         }
     }
@@ -136,15 +131,11 @@ impl<const PIN: u8> Flex<PIN> {
     /// What level output is set to
     pub fn output_level(&self) -> Level {
         cfg_select! {
-            esp32c6 => {
-                ((unsafe { &*LpIo::PTR }.out().read().bits() >> PIN) & 0x1 != 0).into()
-            }
-            esp32s2 => {
-                ((unsafe { &*LpIo::PTR }.out().read().gpio_out_data().bits() >> PIN) & 0x1 != 0).into()
-            }
-            esp32s3 => {
-                ((unsafe { &*LpIo::PTR }.out().read().data().bits() >> PIN) & 0x1 != 0).into()
-            }
+            esp32c6 => ((unsafe { &*LpIo::PTR }.out().read().bits() >> PIN) & 0x1 != 0).into(),
+            esp32s2 => ((unsafe { &*LpIo::PTR }.out().read().gpio_out_data().bits() >> PIN) & 0x1
+                != 0)
+                .into(),
+            esp32s3 => ((unsafe { &*LpIo::PTR }.out().read().data().bits() >> PIN) & 0x1 != 0).into(),
             _ => {}
         }
     }
diff --git a/esp-phy/src/lib.rs b/esp-phy/src/lib.rs
index 15ad18bd64b..ab6d0cb6773 100644
--- a/esp-phy/src/lib.rs
+++ b/esp-phy/src/lib.rs
@@ -214,7 +214,7 @@ impl PhyState {
             }
             phy_combo_module => unsafe {
                 sys::include::phy_init_param_set(1);
-            }
+            },
             _ => {}
         }
 
@@ -453,13 +453,14 @@ fn set_wifi_rx_enabled(enabled: bool) {
             // C5 is excluded for the same reason as `phy_init_param_set` (ESP-IDF leaves
             // `SOC_PHY_COMBO_MODULE` undefined for C5, see:
             // https://github.com/espressif/esp-idf/blob/7e3df61a/components/soc/esp32c5/include/soc/soc_caps.h#L658);
-            // its Wi-Fi adapter only calls `phy_wifi_enable_set` alongside a `set_bb_wdg` workaround
-            // we don't implement yet. TODO: enable for C5 once `set_bb_wdg` is handled.
+            // its Wi-Fi adapter only calls `phy_wifi_enable_set` alongside a `set_bb_wdg`
+            // workaround we don't implement yet. TODO: enable for C5 once `set_bb_wdg`
+            // is handled.
             let _ = enabled;
         }
         phy_combo_module => unsafe {
             sys::include::phy_wifi_enable_set(enabled as u8);
-        }
+        },
         _ => {
             let _ = enabled;
         }
diff --git a/esp-radio/src/ble/os_adapter_esp32.rs b/esp-radio/src/ble/os_adapter_esp32.rs
index 86443fc8581..13a0b356761 100644
--- a/esp-radio/src/ble/os_adapter_esp32.rs
+++ b/esp-radio/src/ble/os_adapter_esp32.rs
@@ -521,9 +521,7 @@ pub(crate) unsafe extern "C" fn coex_schm_register_btdm_callback_wrapper(
             const COEX_SCHM_CALLBACK_TYPE_BT: u32 = 1;
             unsafe { coex_schm_register_callback(COEX_SCHM_CALLBACK_TYPE_BT, callback) }
         }
-        _ => {
-            0
-        }
+        _ => 0,
     }
 }
 
@@ -541,9 +539,7 @@ pub(crate) unsafe extern "C" fn coex_wifi_channel_get(
             }
             unsafe { coex_wifi_channel_get(_primary, _secondary) }
         }
-        _ => {
-            -1
-        }
+        _ => -1,
     }
 }
 
diff --git a/esp-radio/src/ble/os_adapter_esp32c3_s3.rs b/esp-radio/src/ble/os_adapter_esp32c3_s3.rs
index 248e91995de..2e42574bdf2 100644
--- a/esp-radio/src/ble/os_adapter_esp32c3_s3.rs
+++ b/esp-radio/src/ble/os_adapter_esp32c3_s3.rs
@@ -179,15 +179,11 @@ extern "C" fn coex_schm_register_btdm_callback(_callback: *mut c_void) -> i32 {
     trace!("coex_schm_register_btdm_callback");
 
     cfg_select! {
-        feature = "coex" => {
-            unsafe {
-                const COEX_SCHM_CALLBACK_TYPE_BT: u32 = 1;
-                coex_schm_register_callback(COEX_SCHM_CALLBACK_TYPE_BT, _callback)
-            }
-        }
-        _ => {
-            0
-        }
+        feature = "coex" => unsafe {
+            const COEX_SCHM_CALLBACK_TYPE_BT: u32 = 1;
+            coex_schm_register_callback(COEX_SCHM_CALLBACK_TYPE_BT, _callback)
+        },
+        _ => 0,
     }
 }
 
diff --git a/esp-radio/src/common_adapter.rs b/esp-radio/src/common_adapter.rs
index 90ff37fed56..aab6292ce35 100644
--- a/esp-radio/src/common_adapter.rs
+++ b/esp-radio/src/common_adapter.rs
@@ -244,12 +244,12 @@ pub unsafe extern "C" fn __esp_radio_esp_timer_get_time() -> i64 {
     // Just using IEEE802.15.4 doesn't need the current time. If we don't use `preempt::now`, users
     // will not need to have a scheduler in their firmware.
     cfg_select! {
-        any(feature = "wifi", feature = "ble") => {
-            crate::preempt::now() as i64
-        }
+        any(feature = "wifi", feature = "ble") => crate::preempt::now() as i64,
         _ => {
             // In this case we don't have a scheduler, we can return esp-hal's timestamp.
-            esp_hal::time::Instant::now().duration_since_epoch().as_micros() as i64
+            esp_hal::time::Instant::now()
+                .duration_since_epoch()
+                .as_micros() as i64
         }
     }
 }
@@ -328,7 +328,8 @@ pub(crate) fn enable_wifi_power_domain() {
             soc_has_apb_ctrl => {
                 let syscon = regs!(APB_CTRL);
             }
-            _ => { // S2
+            _ => {
+                // S2
                 let syscon = regs!(SYSCON);
             }
         }
diff --git a/esp-radio/src/wifi/csi.rs b/esp-radio/src/wifi/csi.rs
index ea0bb298e5d..5363036fbb9 100644
--- a/esp-radio/src/wifi/csi.rs
+++ b/esp-radio/src/wifi/csi.rs
@@ -140,15 +140,9 @@ impl<'a> WifiCsiInfo<'_> {
     pub fn secondary_channel(&self) -> SecondaryChannel {
         cfg_select! {
             wifi_mac_version = "1" => {
-                SecondaryChannel::from_raw(unsafe {
-                    (*self.inner).rx_ctrl.secondary_channel()
-                })
-            }
-            _ => {
-                SecondaryChannel::from_raw(unsafe {
-                    (*self.inner).rx_ctrl.second()
-                })
+                SecondaryChannel::from_raw(unsafe { (*self.inner).rx_ctrl.secondary_channel() })
             }
+            _ => SecondaryChannel::from_raw(unsafe { (*self.inner).rx_ctrl.second() }),
         }
     }
 
diff --git a/esp-radio/src/wifi/mod.rs b/esp-radio/src/wifi/mod.rs
index 69c3313b79e..54e936debe2 100644
--- a/esp-radio/src/wifi/mod.rs
+++ b/esp-radio/src/wifi/mod.rs
@@ -1005,12 +1005,8 @@ pub(crate) unsafe extern "C" fn coex_init() -> i32 {
     debug!("coex-init");
 
     cfg_select! {
-        feature = "coex" => {
-            unsafe { crate::sys::include::coex_init() }
-        }
-        _ => {
-            0
-        }
+        feature = "coex" => unsafe { crate::sys::include::coex_init() },
+        _ => 0,
     }
 }
 
diff --git a/esp-radio/src/wifi/os_adapter/mod.rs b/esp-radio/src/wifi/os_adapter/mod.rs
index 78496100a3a..2936a959548 100644
--- a/esp-radio/src/wifi/os_adapter/mod.rs
+++ b/esp-radio/src/wifi/os_adapter/mod.rs
@@ -1436,9 +1436,7 @@ pub unsafe extern "C" fn coex_status_get() -> u32 {
             const COEX_STATUS_GET_WIFI_BITMAP: u8 = 1;
             unsafe { crate::sys::include::coex_status_get(COEX_STATUS_GET_WIFI_BITMAP) }
         }
-        _ => {
-            0
-        }
+        _ => 0,
     }
 }
 
@@ -1456,17 +1454,13 @@ pub unsafe extern "C" fn coex_schm_register_cb_wrapper(
     trace!("coex_schm_register_cb_wrapper {} {:?}", arg1, cb);
 
     cfg_select! {
-        feature = "coex" => {
-            unsafe {
-                crate::sys::include::coex_schm_register_callback(
-                    arg1 as u32,
-                    unwrap!(cb) as *mut c_void,
-                )
-            }
-        }
-        _ => {
-            0
-        }
+        feature = "coex" => unsafe {
+            crate::sys::include::coex_schm_register_callback(
+                arg1 as u32,
+                unwrap!(cb) as *mut c_void,
+            )
+        },
+        _ => 0,
     }
 }
 
diff --git a/esp-rom-sys/src/syscall/mod.rs b/esp-rom-sys/src/syscall/mod.rs
index aa7158237c9..317a984c4e0 100644
--- a/esp-rom-sys/src/syscall/mod.rs
+++ b/esp-rom-sys/src/syscall/mod.rs
@@ -186,13 +186,17 @@ pub unsafe fn init_syscall_table() {
             unsafe extern "C" {
                 static mut syscall_table_ptr_pro: *const chip_specific::syscall_stub_table;
             }
-            unsafe { syscall_table_ptr_pro = &raw const SYSCALL_TABLE; }
+            unsafe {
+                syscall_table_ptr_pro = &raw const SYSCALL_TABLE;
+            }
         }
         _ => {
             unsafe extern "C" {
                 static mut syscall_table_ptr: *const chip_specific::syscall_stub_table;
             }
-            unsafe { syscall_table_ptr = &raw const SYSCALL_TABLE; }
+            unsafe {
+                syscall_table_ptr = &raw const SYSCALL_TABLE;
+            }
         }
     };
 }
diff --git a/esp-rtos/src/run_queue.rs b/esp-rtos/src/run_queue.rs
index cc4d4a3800d..4e3c925062f 100644
--- a/esp-rtos/src/run_queue.rs
+++ b/esp-rtos/src/run_queue.rs
@@ -264,7 +264,8 @@ impl RunQueue {
                     Cpu::ProCpu => Cpu::AppCpu,
                 };
 
-                // Look iteratively through priority levels - this will ensure we can find a task even if all high priority tasks are pinned to the other CPU.
+                // Look iteratively through priority levels - this will ensure we can find a task
+                // even if all high priority tasks are pinned to the other CPU.
                 let mut priority_level = self.ready_priority;
 
                 let mut current_prio = current_prio;
@@ -283,7 +284,6 @@ impl RunQueue {
 
                     break;
                 }
-
             }
             _ => {
                 let popped = self.ready_tasks[current_prio].pop();
diff --git a/esp-rtos/src/scheduler.rs b/esp-rtos/src/scheduler.rs
index 3b6b4e5b1dd..ee295ebb702 100644
--- a/esp-rtos/src/scheduler.rs
+++ b/esp-rtos/src/scheduler.rs
@@ -218,12 +218,12 @@ impl SchedulerState {
 
         let current_sp: u32;
         cfg_select! {
-            xtensa => {
-                unsafe { core::arch::asm!("mov {0}, sp", out(reg) current_sp); }
-            }
-            _ => {
-                unsafe { core::arch::asm!("mv {0}, sp", out(reg) current_sp); }
-            }
+            xtensa => unsafe {
+                core::arch::asm!("mov {0}, sp", out(reg) current_sp);
+            },
+            _ => unsafe {
+                core::arch::asm!("mv {0}, sp", out(reg) current_sp);
+            },
         }
 
         let current_task = NonNull::new(read_thread_pointer());
diff --git a/esp-rtos/src/task/mod.rs b/esp-rtos/src/task/mod.rs
index 7f2fea8a41f..a08f5a28a66 100644
--- a/esp-rtos/src/task/mod.rs
+++ b/esp-rtos/src/task/mod.rs
@@ -413,12 +413,8 @@ impl ContextExt for CpuContext {
 
     fn sp(&self) -> u32 {
         cfg_select! {
-            xtensa => {
-                self.A1
-            }
-            _ => {
-                self.sp as u32
-            }
+            xtensa => self.A1,
+            _ => self.sp as u32,
         }
     }
 
@@ -718,9 +714,7 @@ pub(crate) fn trigger_scheduler(run_scheduler: RunSchedulerOn) {
                         schedule_other_core()
                     }
                 }
-                _ => {
-                    yield_task()
-                }
+                _ => yield_task(),
             }
         }
     }
diff --git a/esp-storage/src/common.rs b/esp-storage/src/common.rs
index 60b09f2592f..24d2d0d8bb6 100644
--- a/esp-storage/src/common.rs
+++ b/esp-storage/src/common.rs
@@ -94,7 +94,7 @@ impl<'d> FlashStorage<'d> {
             unlocked: false,
             multi_core_strategy: cfg_select!(
                 multi_core => MultiCoreStrategy::Error,
-                _ => MultiCoreStrategy::Ignore
+                _ => MultiCoreStrategy::Ignore,
             ),
             _flash: flash,
         }
diff --git a/esp-storage/src/mmu.rs b/esp-storage/src/mmu.rs
index 5be2c373a7d..621f834b6ce 100644
--- a/esp-storage/src/mmu.rs
+++ b/esp-storage/src/mmu.rs
@@ -79,7 +79,7 @@ pub(crate) fn map_flash_page(paddr: u32) -> Result<FlashMmapGuard, FlashStorageE
             let entry_id = s2::alloc_entry();
             s2::map_entry(entry_id, page_paddr)?;
             FlashMmapGuard::new(entry_id, page_size, true)
-        },
+        }
         _ => {
             let entry_id = find_free_entry().ok_or(FlashStorageError::NotSupported)?;
             write_flash_entry(entry_id, page_paddr);
diff --git a/esp-sync/src/lib.rs b/esp-sync/src/lib.rs
index 42a1fb5c786..05efbb89c04 100644
--- a/esp-sync/src/lib.rs
+++ b/esp-sync/src/lib.rs
@@ -124,15 +124,9 @@ mod multi_core {
     fn thread_id() -> usize {
         // This method must never return UNUSED_THREAD_ID_VALUE
         cfg_select! {
-            all(multi_core, riscv) => {
-                riscv::register::mhartid::read()
-            }
-            all(multi_core, xtensa) => {
-                (xtensa_lx::get_processor_id() & 0x2000) as usize
-            }
-            _ => {
-                0
-            }
+            all(multi_core, riscv) => riscv::register::mhartid::read(),
+            all(multi_core, xtensa) => (xtensa_lx::get_processor_id() & 0x2000) as usize,
+            _ => 0,
         }
     }
 
diff --git a/esp-sync/src/raw.rs b/esp-sync/src/raw.rs
index 9a55ec9ae20..f6c6cae484c 100644
--- a/esp-sync/src/raw.rs
+++ b/esp-sync/src/raw.rs
@@ -35,7 +35,8 @@ impl RawLock for SingleCoreInterruptLock {
     #[inline]
     unsafe fn enter(&self) -> RestoreState {
         cfg_select! {
-            esp32p4 => { // TODO: any with zcmp
+            esp32p4 => {
+                // TODO: any with zcmp
                 // ESP32-P4 (v3.2/ECO7 etc.) Zcmp hardware bug workaround (IDF-14279 / DIG-661):
                 // Clearing mstatus.mie alone does not fully mask CLIC interrupts -- an
                 // interrupt can still fire mid-instruction on cm.push (and possibly on
@@ -53,18 +54,24 @@ impl RawLock for SingleCoreInterruptLock {
                     );
                 }
                 let mut mstatus = 0u32;
-                unsafe { core::arch::asm!("csrrci {0}, mstatus, 8", inout(reg) mstatus); }
+                unsafe {
+                    core::arch::asm!("csrrci {0}, mstatus, 8", inout(reg) mstatus);
+                }
                 let mie_bit = mstatus & 0b1000;
                 let token = mie_bit | ((old_mintthresh & 0xff) << 8);
             }
             riscv => {
                 let mut mstatus = 0u32;
-                unsafe { core::arch::asm!("csrrci {0}, mstatus, 8", inout(reg) mstatus); }
+                unsafe {
+                    core::arch::asm!("csrrci {0}, mstatus, 8", inout(reg) mstatus);
+                }
                 let token = mstatus & 0b1000;
             }
             xtensa => {
                 let token: u32;
-                unsafe { core::arch::asm!("rsil {0}, 5", out(reg) token); }
+                unsafe {
+                    core::arch::asm!("rsil {0}, 5", out(reg) token);
+                }
                 #[cfg(debug_assertions)]
                 let token = token & !RESERVED_MASK;
             }
@@ -122,7 +129,8 @@ impl RawLock for SingleCoreInterruptLock {
                 #[cfg(debug_assertions)]
                 if token & RESERVED_MASK != 0 {
                     // We could do this transformation in fmt.rs automatically, but experiments
-                    // show this is only worth it in terms of binary size for code inlined into many places.
+                    // show this is only worth it in terms of binary size for code inlined into many
+                    // places.
                     #[cold]
                     #[inline(never)]
                     fn __assert_failed() {
diff --git a/examples/async/embassy_auto_light_sleep/src/main.rs b/examples/async/embassy_auto_light_sleep/src/main.rs
index 048502b9b88..29bf0c03a64 100644
--- a/examples/async/embassy_auto_light_sleep/src/main.rs
+++ b/examples/async/embassy_auto_light_sleep/src/main.rs
@@ -51,10 +51,10 @@ cfg_select! {
         use peripherals::GPIO0 as BOOT_GPIO;
     }
     feature = "esp32c5" => {
-       use peripherals::GPIO28 as BOOT_GPIO;
+        use peripherals::GPIO28 as BOOT_GPIO;
     }
     feature = "esp32p4" => {
-       use peripherals::GPIO35 as BOOT_GPIO;
+        use peripherals::GPIO35 as BOOT_GPIO;
     }
     // esp32c3, esp32c6, esp32c61, esp32h2
     _ => {
diff --git a/examples/async/embassy_rmt_rx/src/main.rs b/examples/async/embassy_rmt_rx/src/main.rs
index 2614eddc609..23ea1bb1f22 100644
--- a/examples/async/embassy_rmt_rx/src/main.rs
+++ b/examples/async/embassy_rmt_rx/src/main.rs
@@ -60,7 +60,9 @@ async fn main(spawner: Spawner) {
         .with_idle_threshold(10000);
 
     let channel = cfg_select! {
-        any(feature = "esp32", feature = "esp32s2") => rmt.channel0.configure_rx(&rx_config).unwrap(),
+        any(feature = "esp32", feature = "esp32s2") => {
+            rmt.channel0.configure_rx(&rx_config).unwrap()
+        }
         feature = "esp32s3" => rmt.channel7.configure_rx(&rx_config).unwrap(),
         _ => rmt.channel2.configure_rx(&rx_config).unwrap(),
     };
diff --git a/examples/async/embassy_serial/src/main.rs b/examples/async/embassy_serial/src/main.rs
index 0f03094aaed..653988923e2 100644
--- a/examples/async/embassy_serial/src/main.rs
+++ b/examples/async/embassy_serial/src/main.rs
@@ -86,7 +86,9 @@ async fn main(spawner: Spawner) {
         feature = "esp32h2" => (peripherals.GPIO24, peripherals.GPIO23),
         feature = "esp32p4" => (peripherals.GPIO6, peripherals.GPIO5),
         feature = "esp32s31" => (peripherals.GPIO3, peripherals.GPIO2),
-        any(feature = "esp32s2", feature = "esp32s3") => (peripherals.GPIO43, peripherals.GPIO44),
+        any(feature = "esp32s2", feature = "esp32s3") => {
+            (peripherals.GPIO43, peripherals.GPIO44)
+        }
     };
 
     let config = Config::default()
diff --git a/examples/interrupt/gpio/src/main.rs b/examples/interrupt/gpio/src/main.rs
index 12925329931..c934f1dd170 100644
--- a/examples/interrupt/gpio/src/main.rs
+++ b/examples/interrupt/gpio/src/main.rs
@@ -44,13 +44,14 @@ fn main() -> ! {
 
     let mut led = Output::new(peripherals.GPIO2, Level::Low, OutputConfig::default());
 
-    let button = cfg_select! {
-        any(feature = "esp32", feature = "esp32s2", feature = "esp32s3") => peripherals.GPIO0,
-        feature = "esp32c5" => peripherals.GPIO28,
-        feature = "esp32p4" => peripherals.GPIO35,
-        feature = "esp32s31" => peripherals.GPIO61,
-        _ => peripherals.GPIO9,
-    };
+    let button =
+        cfg_select! {
+            any(feature = "esp32", feature = "esp32s2", feature = "esp32s3") => peripherals.GPIO0,
+            feature = "esp32c5" => peripherals.GPIO28,
+            feature = "esp32p4" => peripherals.GPIO35,
+            feature = "esp32s31" => peripherals.GPIO61,
+            _ => peripherals.GPIO9,
+        };
 
     let config = InputConfig::default().with_pull(Pull::Up);
     let mut button = Input::new(button, config);
diff --git a/examples/interrupt/uart/src/main.rs b/examples/interrupt/uart/src/main.rs
index 927a886a7ec..43ada67be32 100644
--- a/examples/interrupt/uart/src/main.rs
+++ b/examples/interrupt/uart/src/main.rs
@@ -59,7 +59,9 @@ fn main() -> ! {
         feature = "esp32h2" => (peripherals.GPIO24, peripherals.GPIO23),
         feature = "esp32p4" => (peripherals.GPIO6, peripherals.GPIO5),
         feature = "esp32s31" => (peripherals.GPIO3, peripherals.GPIO2),
-        any(feature = "esp32s2", feature = "esp32s3") => (peripherals.GPIO43, peripherals.GPIO44),
+        any(feature = "esp32s2", feature = "esp32s3") => {
+            (peripherals.GPIO43, peripherals.GPIO44)
+        }
     };
 
     let uart_config = UartConfig::default()
diff --git a/examples/ota/update/src/main.rs b/examples/ota/update/src/main.rs
index e06c7b9d9bd..b5bce0828f5 100644
--- a/examples/ota/update/src/main.rs
+++ b/examples/ota/update/src/main.rs
@@ -93,13 +93,14 @@ fn main() -> ! {
         }
     }
 
-    let button = cfg_select! {
-        any(feature = "esp32", feature = "esp32s2", feature = "esp32s3") => peripherals.GPIO0,
-        feature = "esp32c5" => peripherals.GPIO28,
-        feature = "esp32p4" => peripherals.GPIO35,
-        feature = "esp32s31" => peripherals.GPIO61,
-        _ => peripherals.GPIO9,
-    };
+    let button =
+        cfg_select! {
+            any(feature = "esp32", feature = "esp32s2", feature = "esp32s3") => peripherals.GPIO0,
+            feature = "esp32c5" => peripherals.GPIO28,
+            feature = "esp32p4" => peripherals.GPIO35,
+            feature = "esp32s31" => peripherals.GPIO61,
+            _ => peripherals.GPIO9,
+        };
 
     let boot_button = Input::new(button, InputConfig::default().with_pull(Pull::Up));
 
diff --git a/examples/peripheral/dma/mem2mem/src/main.rs b/examples/peripheral/dma/mem2mem/src/main.rs
index 41449b3b422..a228433f21f 100644
--- a/examples/peripheral/dma/mem2mem/src/main.rs
+++ b/examples/peripheral/dma/mem2mem/src/main.rs
@@ -30,7 +30,9 @@ fn main() -> ! {
     let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(DATA_SIZE);
 
     let mem2mem = cfg_select! {
-        any(feature = "esp32c3", feature = "esp32s3") => Mem2Mem::new(peripherals.DMA_CH0, peripherals.SPI2),
+        any(feature = "esp32c3", feature = "esp32s3") => {
+            Mem2Mem::new(peripherals.DMA_CH0, peripherals.SPI2)
+        }
         feature = "esp32s2" => Mem2Mem::new(peripherals.DMA_COPY),
         feature = "esp32p4" => Mem2Mem::new(peripherals.DMA_AXI_CH0),
         feature = "esp32s31" => Mem2Mem::new(peripherals.DMA_AXI_CH0),
diff --git a/examples/peripheral/lp_core/lp_blinky/src/main.rs b/examples/peripheral/lp_core/lp_blinky/src/main.rs
index 1427e9deae9..f6fbc28081d 100644
--- a/examples/peripheral/lp_core/lp_blinky/src/main.rs
+++ b/examples/peripheral/lp_core/lp_blinky/src/main.rs
@@ -36,7 +36,9 @@ fn main() -> ! {
     let lp_pin = LowPowerOutput::new(peripherals.GPIO1);
 
     let mut lp_core = cfg_select! {
-        any(feature = "esp32s2", feature = "esp32s3") => UlpCore::new(peripherals.ULP_RISCV_CORE),
+        any(feature = "esp32s2", feature = "esp32s3") => {
+            UlpCore::new(peripherals.ULP_RISCV_CORE)
+        }
         _ => LpCore::new(peripherals.LP_CORE),
     };
 
@@ -57,10 +59,11 @@ fn main() -> ! {
     };
 
     // start LP core
-    let wakeup_source = cfg_select! {
-        any(feature = "esp32s2", feature = "esp32s3") => UlpCoreWakeupSource::HpCpu,
-        _ => LpCoreWakeupSource::HpCpu,
-    };
+    let wakeup_source =
+        cfg_select! {
+            any(feature = "esp32s2", feature = "esp32s3") => UlpCoreWakeupSource::HpCpu,
+            _ => LpCoreWakeupSource::HpCpu,
+        };
     lp_core_code.run(&mut lp_core, wakeup_source, lp_pin);
 
     println!("lp core run");
diff --git a/examples/peripheral/spi/loopback_dma_psram/src/main.rs b/examples/peripheral/spi/loopback_dma_psram/src/main.rs
index 5d8858d56b3..a2051f880d0 100644
--- a/examples/peripheral/spi/loopback_dma_psram/src/main.rs
+++ b/examples/peripheral/spi/loopback_dma_psram/src/main.rs
@@ -62,7 +62,8 @@ macro_rules! dma_alloc_tx_buffer {
 
 const DMA_BUFFER_SIZE: usize = 8192;
 const DMA_ALIGNMENT: ExternalBurstConfig = cfg_select! {
-    // ExternalBurstConfig::Size64 is not available on ESP32-S2.
+    // ExternalBurstConfig::Size64 is not available on
+    // ESP32-S2.
     feature = "esp32s2" => ExternalBurstConfig::Size32,
     _ => ExternalBurstConfig::Size64,
 };
@@ -75,10 +76,11 @@ fn main() -> ! {
     esp_alloc::psram_allocator!(peripherals.PSRAM, esp_hal::psram);
     let delay = Delay::new();
 
-    let (sclk, mosi, cs) = cfg_select! {
-        feature = "esp32s3" => (peripherals.GPIO42, peripherals.GPIO48, peripherals.GPIO38),
-        _ => (peripherals.GPIO6, peripherals.GPIO7, peripherals.GPIO10),
-    };
+    let (sclk, mosi, cs) =
+        cfg_select! {
+            feature = "esp32s3" => (peripherals.GPIO42, peripherals.GPIO48, peripherals.GPIO38),
+            _ => (peripherals.GPIO6, peripherals.GPIO7, peripherals.GPIO10),
+        };
     let miso = unsafe { mosi.clone_unchecked() };
 
     let dma_channel = cfg_select! {
diff --git a/hil-test-radio/src/bin/support/ble_peripheral_support.rs b/hil-test-radio/src/bin/support/ble_peripheral_support.rs
index 806da7e4058..f77a0ed8355 100644
--- a/hil-test-radio/src/bin/support/ble_peripheral_support.rs
+++ b/hil-test-radio/src/bin/support/ble_peripheral_support.rs
@@ -45,11 +45,11 @@ fn init_heap() {
             use esp_hal::ram;
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 64 * 1024);
             esp_alloc::heap_allocator!(size: 36 * 1024);
-        },
+        }
         any(esp32c5, esp32h2) => {
             esp_alloc::heap_allocator!(size: 72 * 1024);
-        },
-        _ => {},
+        }
+        _ => {}
     }
 }
 
diff --git a/hil-test-radio/src/bin/support/ieee802154_echo_support.rs b/hil-test-radio/src/bin/support/ieee802154_echo_support.rs
index 8c41a5a9e71..06a4d219b23 100644
--- a/hil-test-radio/src/bin/support/ieee802154_echo_support.rs
+++ b/hil-test-radio/src/bin/support/ieee802154_echo_support.rs
@@ -38,11 +38,11 @@ fn init_heap() {
             use esp_hal::ram;
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 64 * 1024);
             esp_alloc::heap_allocator!(size: 36 * 1024);
-        },
+        }
         any(esp32c5, esp32h2) => {
             esp_alloc::heap_allocator!(size: 72 * 1024);
-        },
-        _ => {},
+        }
+        _ => {}
     }
 }
 
diff --git a/hil-test-radio/src/bin/support/wifi_ap_support.rs b/hil-test-radio/src/bin/support/wifi_ap_support.rs
index 03185117116..bce2073fe91 100644
--- a/hil-test-radio/src/bin/support/wifi_ap_support.rs
+++ b/hil-test-radio/src/bin/support/wifi_ap_support.rs
@@ -39,11 +39,11 @@ fn init_heap() {
             use esp_hal::ram;
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 64 * 1024);
             esp_alloc::heap_allocator!(size: 36 * 1024);
-        },
+        }
         any(esp32c5, esp32h2) => {
             esp_alloc::heap_allocator!(size: 72 * 1024);
-        },
-        _ => {},
+        }
+        _ => {}
     }
 }
 
diff --git a/hil-test-radio/src/bin/tests/ble.rs b/hil-test-radio/src/bin/tests/ble.rs
index 6751a4954e4..0d15fb4a986 100644
--- a/hil-test-radio/src/bin/tests/ble.rs
+++ b/hil-test-radio/src/bin/tests/ble.rs
@@ -29,11 +29,11 @@ fn init_heap() {
             use esp_hal::ram;
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 64 * 1024);
             esp_alloc::heap_allocator!(size: 36 * 1024);
-        },
+        }
         any(esp32c5, esp32h2) => {
             esp_alloc::heap_allocator!(size: 72 * 1024);
-        },
-        _ => {},
+        }
+        _ => {}
     }
 }
 
diff --git a/hil-test-radio/src/bin/tests/ieee802154.rs b/hil-test-radio/src/bin/tests/ieee802154.rs
index d55d506539f..3944abe3215 100644
--- a/hil-test-radio/src/bin/tests/ieee802154.rs
+++ b/hil-test-radio/src/bin/tests/ieee802154.rs
@@ -29,11 +29,11 @@ fn init_heap() {
             use esp_hal::ram;
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 64 * 1024);
             esp_alloc::heap_allocator!(size: 36 * 1024);
-        },
+        }
         any(esp32c5, esp32h2) => {
             esp_alloc::heap_allocator!(size: 72 * 1024);
-        },
-        _ => {},
+        }
+        _ => {}
     }
 }
 
diff --git a/hil-test-radio/src/bin/tests/wifi.rs b/hil-test-radio/src/bin/tests/wifi.rs
index 02a401151b6..1446827e059 100644
--- a/hil-test-radio/src/bin/tests/wifi.rs
+++ b/hil-test-radio/src/bin/tests/wifi.rs
@@ -29,11 +29,11 @@ fn init_heap() {
             use esp_hal::ram;
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 64 * 1024);
             esp_alloc::heap_allocator!(size: 36 * 1024);
-        },
+        }
         any(esp32c5, esp32h2) => {
             esp_alloc::heap_allocator!(size: 72 * 1024);
-        },
-        _ => {},
+        }
+        _ => {}
     }
 }
 
diff --git a/hil-test/src/bin/crypto/rsa.rs b/hil-test/src/bin/crypto/rsa.rs
index 3ef662534e3..5300656e02a 100644
--- a/hil-test/src/bin/crypto/rsa.rs
+++ b/hil-test/src/bin/crypto/rsa.rs
@@ -83,105 +83,89 @@ mod tests {
                 type MAX = crypto_bigint::U3072;
                 type MaxOp = Op3072;
 
-                const MODULUS: MAX = Uint::from_be_hex(
-                    concat!(
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                    )
-                );
+                const MODULUS: MAX = Uint::from_be_hex(concat!(
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                ));
                 // 1000
-                const RESULT: MAX = Uint::from_be_hex(
-                    concat!(
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E8",
-                    )
-                );
+                const RESULT: MAX = Uint::from_be_hex(concat!(
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E8",
+                ));
                 // 10
-                const TEN: MAX = Uint::from_be_hex(
-                    concat!(
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A",
-                    )
-                );
+                const TEN: MAX = Uint::from_be_hex(concat!(
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A",
+                ));
                 // 3
-                const THREE: MAX = Uint::from_be_hex(
-                    concat!(
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003",
-                    )
-                );
+                const THREE: MAX = Uint::from_be_hex(concat!(
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003",
+                ));
             }
             rsa_memory_size_bytes = "512" => {
                 type MAX = crypto_bigint::U4096;
                 type MaxOp = Op4096;
 
-                const MODULUS: MAX = Uint::from_be_hex(
-                    concat!(
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                        "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
-                    )
-                );
+                const MODULUS: MAX = Uint::from_be_hex(concat!(
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                    "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+                ));
                 // 1000
-                static RESULT: MAX = Uint::from_be_hex(
-                    concat!(
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E8",
-                    )
-                );
+                static RESULT: MAX = Uint::from_be_hex(concat!(
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E8",
+                ));
                 // 10
-                static TEN: MAX = Uint::from_be_hex(
-                    concat!(
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A",
-                    )
-                );
+                static TEN: MAX = Uint::from_be_hex(concat!(
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A",
+                ));
                 // 3
-                static THREE: MAX = Uint::from_be_hex(
-                    concat!(
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
-                        "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003",
-                    )
-                );
+                static THREE: MAX = Uint::from_be_hex(concat!(
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
+                    "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003",
+                ));
             }
             _ => {
                 compile_error!("Unhandled max RSA operand size");
diff --git a/hil-test/src/bin/embassy_timers_executors.rs b/hil-test/src/bin/embassy_timers_executors.rs
index ba68ad0e9f3..108f5178203 100644
--- a/hil-test/src/bin/embassy_timers_executors.rs
+++ b/hil-test/src/bin/embassy_timers_executors.rs
@@ -506,15 +506,14 @@ mod interrupt_spi_dma {
         let timg0 = TimerGroup::new(peripherals.TIMG0);
         esp_rtos::start(timg0.timer0, sw_int.software_interrupt0);
 
-        let (dma_channel1, dma_channel2) = cfg_select! {
-            spi_master_dma_engine = "SPI_DMA" => {
-                (peripherals.DMA_SPI2, peripherals.DMA_SPI3)
-            }
-            spi_master_dma_engine = "AXI_GDMA" => {
-                (peripherals.DMA_AXI_CH0, peripherals.DMA_AXI_CH1)
-            }
-            _ => (peripherals.DMA_CH0, peripherals.DMA_CH1),
-        };
+        let (dma_channel1, dma_channel2) =
+            cfg_select! {
+                spi_master_dma_engine = "SPI_DMA" => (peripherals.DMA_SPI2, peripherals.DMA_SPI3),
+                spi_master_dma_engine = "AXI_GDMA" => {
+                    (peripherals.DMA_AXI_CH0, peripherals.DMA_AXI_CH1)
+                }
+                _ => (peripherals.DMA_CH0, peripherals.DMA_CH1),
+            };
 
         let dma_rx_buf = dma_rx_buffer!(1024).unwrap();
         let dma_tx_buf = dma_tx_buffer!(1024).unwrap();
diff --git a/hil-test/src/bin/gpio.rs b/hil-test/src/bin/gpio.rs
index c621eca4972..706fc3a7c35 100644
--- a/hil-test/src/bin/gpio.rs
+++ b/hil-test/src/bin/gpio.rs
@@ -14,8 +14,11 @@ use hil_test as _;
 cfg_select! {
     feature = "unstable" => {
         use core::cell::RefCell;
+
         use critical_section::Mutex;
         use embassy_time::{Duration, Timer};
+        #[cfg(multi_core)]
+        use esp_hal::system::Stack;
         use esp_hal::{
             // OutputOpenDrain is here because will be unused otherwise
             delay::Delay,
@@ -24,8 +27,6 @@ cfg_select! {
             timer::timg::TimerGroup,
         };
         #[cfg(multi_core)]
-        use esp_hal::system::Stack;
-        #[cfg(multi_core)]
         use hil_test::mk_static;
         use portable_atomic::{AtomicUsize, Ordering};
 
diff --git a/hil-test/src/bin/i2s.rs b/hil-test/src/bin/i2s.rs
index 6aad81f0b5a..a745021519b 100644
--- a/hil-test/src/bin/i2s.rs
+++ b/hil-test/src/bin/i2s.rs
@@ -12,22 +12,14 @@
 macro_rules! i2s_test_dma_channel {
     ($peripherals:ident, I2S0) => {
         cfg_select! {
-            i2s_dma_engine = "I2S_DMA" => {
-                $peripherals.DMA_I2S0.into()
-            }
-            _ => {
-                $peripherals.DMA_CH0.into()
-            }
+            i2s_dma_engine = "I2S_DMA" => $peripherals.DMA_I2S0.into(),
+            _ => $peripherals.DMA_CH0.into(),
         }
     };
     ($peripherals:ident, I2S1) => {
         cfg_select! {
-            i2s_dma_engine = "I2S_DMA" => {
-                $peripherals.DMA_I2S1.into()
-            }
-            _ => {
-                $peripherals.DMA_CH0.into()
-            }
+            i2s_dma_engine = "I2S_DMA" => $peripherals.DMA_I2S1.into(),
+            _ => $peripherals.DMA_CH0.into(),
         }
     };
     ($peripherals:ident, I2S2) => {
diff --git a/hil-test/src/bin/spi.rs b/hil-test/src/bin/spi.rs
index d576ef0d53e..48e545df0e2 100644
--- a/hil-test/src/bin/spi.rs
+++ b/hil-test/src/bin/spi.rs
@@ -21,27 +21,25 @@ use hil_test as _;
 
 cfg_select! {
     feature = "unstable" => {
-        use esp_hal::peripherals::SPI2;
-        use esp_hal::spi::master::{Address, Command, DataMode};
-
+        #[cfg(all(spi_master_supports_dma, dma_can_access_psram))]
+        use allocator_api2::vec::Vec;
+        #[cfg(all(spi_master_supports_dma, pcnt_driver_supported))]
+        use esp_hal::Async;
+        #[cfg(pcnt_driver_supported)]
+        use esp_hal::pcnt::{Pcnt, channel::EdgeMode, unit::Unit};
         #[cfg(spi_master_supports_dma)]
         use esp_hal::{
-            gpio::{Level, NoPin},
             dma::{DmaDescriptor, DmaRxBuf, DmaTxBuf, aligned::DmaAlignedMut},
             dma_buffers,
             dma_rx_buffer,
             dma_tx_buffer,
+            gpio::{Level, NoPin},
             spi::master::SpiDma,
         };
-
-        #[cfg(all(spi_master_supports_dma, dma_can_access_psram))]
-        use allocator_api2::vec::Vec;
-
-        #[cfg(pcnt_driver_supported)]
-        use esp_hal::pcnt::{channel::EdgeMode, unit::Unit, Pcnt};
-
-        #[cfg(all(spi_master_supports_dma, pcnt_driver_supported))]
-        use esp_hal::Async;
+        use esp_hal::{
+            peripherals::SPI2,
+            spi::master::{Address, Command, DataMode},
+        };
     }
     _ => {}
 }
@@ -325,15 +323,9 @@ mod tests {
 
         #[cfg(all(spi_master_supports_dma, feature = "unstable"))]
         let dma_channel = cfg_select! {
-            spi_master_dma_engine = "SPI_DMA" => {
-                peripherals.DMA_SPI2
-            },
-            spi_master_dma_engine = "AHB_GDMA" => {
-                peripherals.DMA_CH0
-            },
-            spi_master_dma_engine = "AXI_GDMA" => {
-                peripherals.DMA_AXI_CH0
-            },
+            spi_master_dma_engine = "SPI_DMA" => peripherals.DMA_SPI2,
+            spi_master_dma_engine = "AHB_GDMA" => peripherals.DMA_CH0,
+            spi_master_dma_engine = "AXI_GDMA" => peripherals.DMA_AXI_CH0,
         };
 
         cfg_select! {
@@ -361,32 +353,28 @@ mod tests {
         .with_mosi(mosi);
 
         cfg_select! {
-            feature = "unstable" => {
-                Context {
-                    spi,
-                    rx_buffer,
-                    tx_buffer,
-                    miso_input,
-                    #[cfg(pcnt_driver_supported)]
-                    sclk_input,
-                    #[cfg(spi_master_supports_dma)]
-                    dma_channel,
-                    #[cfg(spi_master_supports_dma)]
-                    rx_descriptors,
-                    #[cfg(spi_master_supports_dma)]
-                    tx_descriptors,
-                    #[cfg(pcnt_driver_supported)]
-                    pcnt_unit: Pcnt::new(peripherals.PCNT).unit0,
-                }
-            }
-            _ => {
-                Context {
-                    spi,
-                    rx_buffer,
-                    tx_buffer,
-                    miso_input,
-                }
-            }
+            feature = "unstable" => Context {
+                spi,
+                rx_buffer,
+                tx_buffer,
+                miso_input,
+                #[cfg(pcnt_driver_supported)]
+                sclk_input,
+                #[cfg(spi_master_supports_dma)]
+                dma_channel,
+                #[cfg(spi_master_supports_dma)]
+                rx_descriptors,
+                #[cfg(spi_master_supports_dma)]
+                tx_descriptors,
+                #[cfg(pcnt_driver_supported)]
+                pcnt_unit: Pcnt::new(peripherals.PCNT).unit0,
+            },
+            _ => Context {
+                spi,
+                rx_buffer,
+                tx_buffer,
+                miso_input,
+            },
         }
     }
 
@@ -1667,15 +1655,9 @@ mod read {
 
         #[cfg(spi_master_supports_dma)]
         let dma_channel = cfg_select! {
-            spi_master_dma_engine = "SPI_DMA" => {
-                peripherals.DMA_SPI2
-            },
-            spi_master_dma_engine = "AHB_GDMA" => {
-                peripherals.DMA_CH0
-            },
-            spi_master_dma_engine = "AXI_GDMA" => {
-                peripherals.DMA_AXI_CH0
-            },
+            spi_master_dma_engine = "SPI_DMA" => peripherals.DMA_SPI2,
+            spi_master_dma_engine = "AHB_GDMA" => peripherals.DMA_CH0,
+            spi_master_dma_engine = "AXI_GDMA" => peripherals.DMA_AXI_CH0,
         };
 
         let spi = Spi::new(
@@ -1955,15 +1937,9 @@ mod write {
 
         #[cfg(spi_master_supports_dma)]
         let dma_channel = cfg_select! {
-            spi_master_dma_engine = "SPI_DMA" => {
-                peripherals.DMA_SPI2
-            },
-            spi_master_dma_engine = "AHB_GDMA" => {
-                peripherals.DMA_CH0
-            },
-            spi_master_dma_engine = "AXI_GDMA" => {
-                peripherals.DMA_AXI_CH0
-            },
+            spi_master_dma_engine = "SPI_DMA" => peripherals.DMA_SPI2,
+            spi_master_dma_engine = "AHB_GDMA" => peripherals.DMA_CH0,
+            spi_master_dma_engine = "AXI_GDMA" => peripherals.DMA_AXI_CH0,
         };
 
         let mut mosi = Flex::new(mosi);
@@ -2282,12 +2258,8 @@ mod spi_slave {
 
         #[cfg(spi_slave_supports_dma)]
         let dma_channel = cfg_select! {
-            spi_slave_dma_engine = "SPI_DMA" => {
-                peripherals.DMA_SPI2
-            },
-            spi_slave_dma_engine = "AHB_GDMA" => {
-                peripherals.DMA_CH0
-            },
+            spi_slave_dma_engine = "SPI_DMA" => peripherals.DMA_SPI2,
+            spi_slave_dma_engine = "AHB_GDMA" => peripherals.DMA_CH0,
         };
 
         let mut mosi_gpio = Flex::new(mosi_pin);
@@ -2401,7 +2373,8 @@ mod qspi_dma {
             const COMMAND_DATA_MODES: [DataMode; 1] = [DataMode::SingleTwoDataLines];
         }
         _ => {
-            const COMMAND_DATA_MODES: [DataMode; 2] = [DataMode::SingleTwoDataLines, DataMode::Quad];
+            const COMMAND_DATA_MODES: [DataMode; 2] =
+                [DataMode::SingleTwoDataLines, DataMode::Quad];
         }
     }
 
@@ -2728,15 +2701,9 @@ mod qspi_dma {
         let _ = Input::new(unconnected_pin.reborrow(), config);
 
         let dma_channel = cfg_select! {
-            spi_master_dma_engine = "SPI_DMA" => {
-                peripherals.DMA_SPI2
-            },
-            spi_master_dma_engine = "AHB_GDMA" => {
-                peripherals.DMA_CH0
-            },
-            spi_master_dma_engine = "AXI_GDMA" => {
-                peripherals.DMA_AXI_CH0
-            },
+            spi_master_dma_engine = "SPI_DMA" => peripherals.DMA_SPI2,
+            spi_master_dma_engine = "AHB_GDMA" => peripherals.DMA_CH0,
+            spi_master_dma_engine = "AXI_GDMA" => peripherals.DMA_AXI_CH0,
         };
 
         let spi = Spi::new(
diff --git a/hil-test/src/bin/uart.rs b/hil-test/src/bin/uart.rs
index 8b8d0ac17e2..63841ef5dad 100644
--- a/hil-test/src/bin/uart.rs
+++ b/hil-test/src/bin/uart.rs
@@ -30,10 +30,11 @@ mod tests {
 
     #[init]
     fn init() -> Context {
-        let config = cfg_select! {
-            esp32s31 => esp_hal::Config::default(),
-            _ => esp_hal::Config::default().with_cpu_clock(esp_hal::clock::CpuClock::max()),
-        };
+        let config =
+            cfg_select! {
+                esp32s31 => esp_hal::Config::default(),
+                _ => esp_hal::Config::default().with_cpu_clock(esp_hal::clock::CpuClock::max()),
+            };
         let peripherals = esp_hal::init(config);
 
         let (rx, tx) = hil_test::common_test_pins!(peripherals);
@@ -171,12 +172,13 @@ mod tests {
         // working as expected. We will also using different clock sources
         // while we're at it.
 
-        let fastest_clock_source = cfg_select! {
-            esp32c2 => ClockSource::PllF40m,
-            any(esp32c5, esp32c6, esp32c61, esp32p4, esp32s31) => ClockSource::PllF80m,
-            esp32h2 => ClockSource::PllF48m,
-            _ => ClockSource::Apb,
-        };
+        let fastest_clock_source =
+            cfg_select! {
+                esp32c2 => ClockSource::PllF40m,
+                any(esp32c5, esp32c6, esp32c61, esp32p4, esp32s31) => ClockSource::PllF80m,
+                esp32h2 => ClockSource::PllF48m,
+                _ => ClockSource::Apb,
+            };
 
         let configs = [
             #[cfg(not(soc_has_clock_node_ref_tick))]
diff --git a/qa-test/src/bin/embassy_i2s_pdm_rx.rs b/qa-test/src/bin/embassy_i2s_pdm_rx.rs
index 1516834ad02..e4414b77745 100644
--- a/qa-test/src/bin/embassy_i2s_pdm_rx.rs
+++ b/qa-test/src/bin/embassy_i2s_pdm_rx.rs
@@ -93,9 +93,7 @@ async fn main(_spawner: Spawner) {
         any(feature = "esp32", feature = "esp32s3", feature = "esp32p4") => {
             PdmRxConfig::new_pcm_default(Rate::from_hz(16_000), PdmSlotMode::Mono)
         }
-        _ => {
-            PdmRxConfig::new_raw_default(Rate::from_hz(2_048_000), PdmSlotMode::Mono)
-        }
+        _ => PdmRxConfig::new_raw_default(Rate::from_hz(2_048_000), PdmSlotMode::Mono),
     };
     let pdm_cfg = PdmConfig::rx_only(rx_cfg);
 
diff --git a/qa-test/src/bin/mcpwm.rs b/qa-test/src/bin/mcpwm.rs
index 511246fb474..a8ecc3529a6 100644
--- a/qa-test/src/bin/mcpwm.rs
+++ b/qa-test/src/bin/mcpwm.rs
@@ -26,7 +26,9 @@ fn main() -> ! {
     let pin = peripherals.GPIO0;
 
     let clock_cfg = cfg_select! {
-        feature = "esp32h2" => PeripheralClockConfig::with_frequency(Rate::from_mhz(40)).unwrap(),
+        feature = "esp32h2" => {
+            PeripheralClockConfig::with_frequency(Rate::from_mhz(40)).unwrap()
+        }
         _ => PeripheralClockConfig::with_frequency(Rate::from_mhz(32)).unwrap(),
     };
 
diff --git a/qa-test/src/bin/sdmmc_sd_async.rs b/qa-test/src/bin/sdmmc_sd_async.rs
index 25a8f552a53..cfff66fe29e 100644
--- a/qa-test/src/bin/sdmmc_sd_async.rs
+++ b/qa-test/src/bin/sdmmc_sd_async.rs
@@ -80,7 +80,9 @@ async fn main(_spawner: Spawner) {
     let slot_config = SlotConfig::default();
     cfg_select! {
         feature = "esp32s3" => {
-            let slot = controller.slot::<1>(slot_config.with_input_delay_phase(INPUT_DELAY_PHASE)).unwrap();
+            let slot = controller
+                .slot::<1>(slot_config.with_input_delay_phase(INPUT_DELAY_PHASE))
+                .unwrap();
             let slot = slot
                 .with_clk(peripherals.GPIO39)
                 .with_cmd(peripherals.GPIO38)
@@ -97,7 +99,9 @@ async fn main(_spawner: Spawner) {
                 .with_data3(peripherals.GPIO13);
         }
         feature = "esp32p4" => {
-            let slot = controller.slot::<0>(slot_config.with_input_delay_phase(INPUT_DELAY_PHASE)).unwrap();
+            let slot = controller
+                .slot::<0>(slot_config.with_input_delay_phase(INPUT_DELAY_PHASE))
+                .unwrap();
             let slot = slot
                 .with_clk(peripherals.GPIO43)
                 .with_cmd(peripherals.GPIO44)
diff --git a/qa-test/src/bin/sleep_timer_lpio.rs b/qa-test/src/bin/sleep_timer_lpio.rs
index ab5f77a14f2..763455ff9bd 100644
--- a/qa-test/src/bin/sleep_timer_lpio.rs
+++ b/qa-test/src/bin/sleep_timer_lpio.rs
@@ -38,7 +38,12 @@ fn main() -> ! {
     let mut lpwr = LowPower::new(peripherals.LPWR);
 
     cfg_select! {
-        any(feature = "esp32c5", feature = "esp32c6", feature = "esp32c61", feature = "esp32p4") => {
+        any(
+            feature = "esp32c5",
+            feature = "esp32c6",
+            feature = "esp32c61",
+            feature = "esp32p4"
+        ) => {
             let mut pin_low = peripherals.GPIO2;
             let mut pin_high = peripherals.GPIO3;
         }
diff --git a/qa-test/src/bin/sleep_timer_rtcio.rs b/qa-test/src/bin/sleep_timer_rtcio.rs
index 469804310f9..cfa22327d97 100644
--- a/qa-test/src/bin/sleep_timer_rtcio.rs
+++ b/qa-test/src/bin/sleep_timer_rtcio.rs
@@ -54,20 +54,16 @@ fn main() -> ! {
             let mut pin3 = peripherals.GPIO3;
             let _pin2_input = Input::new(pin2.reborrow(), config);
 
-            let wakeup_pins: &mut [(&mut dyn gpio::RtcPinWithResistors, Level)] = &mut [
-                (&mut pin2, Level::Low),
-                (&mut pin3, Level::High),
-            ];
+            let wakeup_pins: &mut [(&mut dyn gpio::RtcPinWithResistors, Level)] =
+                &mut [(&mut pin2, Level::Low), (&mut pin3, Level::High)];
         }
         any(feature = "esp32s2", feature = "esp32s3") => {
             let mut pin17 = peripherals.GPIO17;
             let mut pin18 = peripherals.GPIO18;
             let _pin17_input = Input::new(pin17.reborrow(), config);
 
-            let wakeup_pins: &mut [(&mut dyn gpio::RtcPin, Level)] = &mut [
-                (&mut pin17, Level::Low),
-                (&mut pin18, Level::High),
-            ];
+            let wakeup_pins: &mut [(&mut dyn gpio::RtcPin, Level)] =
+                &mut [(&mut pin17, Level::Low), (&mut pin18, Level::High)];
         }
         _ => {}
     }
diff --git a/qa-test/src/bin/wifi_ble_modem_handoff.rs b/qa-test/src/bin/wifi_ble_modem_handoff.rs
index 1d8c785ba14..d25dfee1bd7 100644
--- a/qa-test/src/bin/wifi_ble_modem_handoff.rs
+++ b/qa-test/src/bin/wifi_ble_modem_handoff.rs
@@ -47,12 +47,8 @@ static mut ITERATION: u32 = 0;
 
 fn load_iteration() -> u32 {
     cfg_select! {
-        feature = "esp32c2" => {
-            esp_hal::peripherals::LPWR::regs().store6().read().bits()
-        },
-        feature = "esp32c61" => {
-            esp_hal::peripherals::LP_AON::regs().store6().read().bits()
-        },
+        feature = "esp32c2" => esp_hal::peripherals::LPWR::regs().store6().read().bits(),
+        feature = "esp32c61" => esp_hal::peripherals::LP_AON::regs().store6().read().bits(),
         _ => unsafe { ITERATION },
     }
 }
@@ -62,12 +58,12 @@ fn store_iteration(value: u32) {
             esp_hal::peripherals::LPWR::regs()
                 .store6()
                 .write(|w| unsafe { w.bits(value) });
-        },
+        }
         feature = "esp32c61" => {
             esp_hal::peripherals::LP_AON::regs()
                 .store6()
                 .write(|w| unsafe { w.bits(value) });
-        },
+        }
         _ => unsafe { ITERATION = value },
     }
 }
@@ -102,11 +98,11 @@ fn init_heap() {
         feature = "esp32" => {
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 96 * 1024);
             esp_alloc::heap_allocator!(size: 24 * 1024);
-        },
+        }
         _ => {
             esp_alloc::heap_allocator!(#[ram(reclaimed)] size: 64 * 1024);
             esp_alloc::heap_allocator!(size: 64 * 1024);
-        },
+        }
     }
 }