From b9feffd4a392fed3f949dfa19f3ae2a7e45c450f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alvin=20=C5=A0ipraga?= Date: Tue, 11 Aug 2026 17:59:04 +0200 Subject: [PATCH] WIP: sdhci-dwc: adsp-sc598: consume emmc_timer_cmq clock Fixes an odd race. Need to understand when/why this clock is needed. To reproduce: build with CONFIG_MMC_SDHCI_OF_DWCMSHC=m and boot rootfs over NFS. Then mmc will probe much later than the disabling of unused clocks. emmc_timer_cmq is then disabled and you hit the error. Another issue: the clock in the DT headers is mislabelled QMC. Also in the clock driver. To fix... --- arch/arm64/boot/dts/adi/sc59x-64.dtsi | 7 ++++--- drivers/mmc/host/sdhci-of-dwcmshc.c | 22 ++++++++++++++++++++++ 2 files changed, 26 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/adi/sc59x-64.dtsi b/arch/arm64/boot/dts/adi/sc59x-64.dtsi index 69df9a7098a09e..c9f5347ee9d150 100644 --- a/arch/arm64/boot/dts/adi/sc59x-64.dtsi +++ b/arch/arm64/boot/dts/adi/sc59x-64.dtsi @@ -659,12 +659,13 @@ mmc0: mmc@310c7000 { - compatible = "snps,dwcmshc-sdhci"; + compatible = "adi,adsp-sc598-dwcmshc", "snps,dwcmshc-sdhci"; reg = <0x310c7000 0x1000>; interrupts = ; /* Status */ /*;*/ /* Wakeup */ - clocks = <&clk ADSP_SC598_CLK_EMMC>; - clock-names = "core"; + clocks = <&clk ADSP_SC598_CLK_EMMC>, + <&clk ADSP_SC598_CLK_EMMC_TIMER_QMC>; + clock-names = "core", "timer"; bus-width = <8>; status = "disabled"; }; diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index 5b7ffc359414ad..dc99134853a92a 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -1120,6 +1120,15 @@ static int sg2042_init(struct device *dev, struct sdhci_host *host, ARRAY_SIZE(clk_ids), clk_ids); } +static int dwcmshc_adsp_sc598_init(struct device *dev, struct sdhci_host *host, + struct dwcmshc_priv *dwc_priv) +{ + static const char * const clk_ids[] = {"timer"}; + + return dwcmshc_get_enable_other_clks(mmc_dev(host->mmc), dwc_priv, + ARRAY_SIZE(clk_ids), clk_ids); +} + static const struct sdhci_ops sdhci_dwcmshc_ops = { .set_clock = sdhci_set_clock, .set_bus_width = sdhci_set_bus_width, @@ -1202,6 +1211,15 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_pdata = { }, }; +static const struct dwcmshc_pltfm_data sdhci_dwcmshc_adsp_sc598_pdata = { + .pdata = { + .ops = &sdhci_dwcmshc_ops, + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + }, + .init = dwcmshc_adsp_sc598_init, +}; + #ifdef CONFIG_ACPI static const struct dwcmshc_pltfm_data sdhci_dwcmshc_bf3_pdata = { .pdata = { @@ -1343,6 +1361,10 @@ static const struct of_device_id sdhci_dwcmshc_dt_ids[] = { .compatible = "rockchip,rk3568-dwcmshc", .data = &sdhci_dwcmshc_rk35xx_pdata, }, + { + .compatible = "adi,adsp-sc598-dwcmshc", + .data = &sdhci_dwcmshc_adsp_sc598_pdata, + }, { .compatible = "snps,dwcmshc-sdhci", .data = &sdhci_dwcmshc_pdata,