diff --git a/components/patina_smbios/README.md b/components/patina_smbios/README.md
index ab58d7be5..3f3664b93 100644
--- a/components/patina_smbios/README.md
+++ b/components/patina_smbios/README.md
@@ -98,10 +98,9 @@ Only SMBIOS 3.x versions are supported.
 
 If you want to develop your own Patina-based platform SMBIOS component, remove
 your platform's existing SMBIOS driver (e.g., `SmbiosPlatformDxe`,
-`SbsaQemuSmbiosDxe`, `ProcessorSubClassDxe`) from your DSC and FDF files, then
-create a platform-specific component that populates your SMBIOS tables. This
-component uses the `#[component]` macro and receives the `Smbios` service as a
-parameter:
+`ProcessorSubClassDxe`) from your DSC and FDF files, then create a
+platform-specific component that populates your SMBIOS tables. This component
+uses the `#[component]` macro and receives the `Smbios` service as a parameter:
 
 ```rust
 use patina::component::{component, service::Service};
diff --git a/core/patina_debugger/README.md b/core/patina_debugger/README.md
index d78ce606e..c69f5e926 100644
--- a/core/patina_debugger/README.md
+++ b/core/patina_debugger/README.md
@@ -62,7 +62,7 @@ In addition, active examples are available in the
 - [QEMU Q35](https://github.com/OpenDevicePartnership/patina-dxe-core-qemu/blob/main/bin/q35_dxe_core.rs)
   - Intel platform with serial debug over UART 16550 with I/O port access
 
-- [QEMU SBSA](https://github.com/OpenDevicePartnership/patina-dxe-core-qemu/blob/main/bin/sbsa_dxe_core.rs)
+- [QEMU ArmVirt](https://github.com/OpenDevicePartnership/patina-dxe-core-qemu/blob/main/bin/arm_virt_dxe_core.rs)
   - AArch64 platform with serial debug over UART PL011 with MMIO access
 
 ## Feature flags
diff --git a/core/patina_stacktrace/README.md b/core/patina_stacktrace/README.md
index 90b3b4ae3..c37503b60 100644
--- a/core/patina_stacktrace/README.md
+++ b/core/patina_stacktrace/README.md
@@ -17,36 +17,36 @@ C:\> .\resolve_stacktrace.cmd
 Enter the PDB directory path (leave empty to use STACKTRACE_PDB_DIR env): C:\temp\stacktrace
 Enter stack trace lines (press Enter twice to finish):
 WARN -       # Child-SP              Return Address         Call Site
-WARN -       0 000001007E2796C0      000001007E27BBDC       qemu_sbsa_dxe_core+185DC
-WARN -       1 000001007E2796F0      000001007E34FB58       qemu_sbsa_dxe_core+1BDC
-WARN -       2 000001007E2797C0      000001007E34F6D0       qemu_sbsa_dxe_core+D5B54
-WARN -       3 000001007E2797F0      000001007E35076C       qemu_sbsa_dxe_core+D56CC
-WARN -       4 000001007E2798A0      000001007E29CEFC       qemu_sbsa_dxe_core+D676C
-WARN -       5 000001007E2798B0      000001007E2A9CB0       qemu_sbsa_dxe_core+22EFC
-WARN -       6 000001007E279920      000001007E2A5EF8       qemu_sbsa_dxe_core+2FCB0
-WARN -       7 000001007E279A00      000001007E2A6628       qemu_sbsa_dxe_core+2BEF8
-WARN -       8 000001007E279A90      000001007E2895A4       qemu_sbsa_dxe_core+2C628
-WARN -       9 000001007E279AD0      000001007E28A1D8       qemu_sbsa_dxe_core+F5A4
-WARN -      10 000001007E279BC0      000001007E27BE24       qemu_sbsa_dxe_core+101D8
+WARN -       0 000001007E2796C0      000001007E27BBDC       qemu_armvirt_dxe_core+185DC
+WARN -       1 000001007E2796F0      000001007E34FB58       qemu_armvirt_dxe_core+1BDC
+WARN -       2 000001007E2797C0      000001007E34F6D0       qemu_armvirt_dxe_core+D5B54
+WARN -       3 000001007E2797F0      000001007E35076C       qemu_armvirt_dxe_core+D56CC
+WARN -       4 000001007E2798A0      000001007E29CEFC       qemu_armvirt_dxe_core+D676C
+WARN -       5 000001007E2798B0      000001007E2A9CB0       qemu_armvirt_dxe_core+22EFC
+WARN -       6 000001007E279920      000001007E2A5EF8       qemu_armvirt_dxe_core+2FCB0
+WARN -       7 000001007E279A00      000001007E2A6628       qemu_armvirt_dxe_core+2BEF8
+WARN -       8 000001007E279A90      000001007E2895A4       qemu_armvirt_dxe_core+2C628
+WARN -       9 000001007E279AD0      000001007E28A1D8       qemu_armvirt_dxe_core+F5A4
+WARN -      10 000001007E279BC0      000001007E27BE24       qemu_armvirt_dxe_core+101D8
 
 # cspell:disable
 ┌────┬──────────────────────────────────────────────────────────────────────┬──────────────────┬──────────────────┬─────────────────────────────────────────────────────────────────────┐
 │ #  ┆ Source Path                                                          ┆ Child-SP         ┆ Return Address   ┆ Call Site                                                           │
 ╞════╪══════════════════════════════════════════════════════════════════════╪══════════════════╪══════════════════╪═════════════════════════════════════════════════════════════════════╡
-│ 0  ┆ /home/vineel/repos/patina/core/patina_stacktrace/src/stacktrace.rs @ ┆ 000001007E2796C0 ┆ 000001007E27BBDC ┆ qemu_sbsa_dxe_core!patina_stacktrace::stacktrace::StackTrace::dump( │
+│ 0  ┆ /home/vineel/repos/patina/core/patina_stacktrace/src/stacktrace.rs @ ┆ 000001007E2796C0 ┆ 000001007E27BBDC ┆ qemu_armvirt_dxe_core!patina_stacktrace::stacktrace::StackTrace::dump( │
 │    ┆ 144                                                                  ┆                  ┆                  ┆ )+0xC                                                               │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 1  ┆ /home/vineel/repos/patina-dxe-core-qemu/bin/sbsa_dxe_core.rs @ 24    ┆ 000001007E2796F0 ┆ 000001007E34FB58 ┆ qemu_sbsa_dxe_core!qemu_sbsa_dxe_core::panic(core::panic::panic_inf │
+│ 1  ┆ /home/vineel/repos/patina-dxe-core-qemu/bin/arm_virt_dxe_core.rs @ 24    ┆ 000001007E2796F0 ┆ 000001007E34FB58 ┆ qemu_armvirt_dxe_core!qemu_armvirt_dxe_core::panic(core::panic::panic_inf │
 │    ┆                                                                      ┆                  ┆                  ┆ o::PanicInfo*)+0x88                                                 │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 2  ┆ /home/vineel/.rustup/toolchains/1.89.0-x86_64-unknown-linux-gnu/lib/ ┆ 000001007E2797C0 ┆ 000001007E34F6D0 ┆ qemu_sbsa_dxe_core!core::panicking::panic_fmt(core::fmt::Arguments, │
+│ 2  ┆ /home/vineel/.rustup/toolchains/1.89.0-x86_64-unknown-linux-gnu/lib/ ┆ 000001007E2797C0 ┆ 000001007E34F6D0 ┆ qemu_armvirt_dxe_core!core::panicking::panic_fmt(core::fmt::Arguments, │
 │    ┆ rustlib/src/rust/library/core/src/panicking.rs @ 75                  ┆                  ┆                  ┆ core::panic::location::Location*)+0x18                              │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 3  ┆ /home/vineel/repos/patina/components/patina_samples/src/component/he ┆ 000001007E2797F0 ┆ 000001007E35076C ┆ qemu_sbsa_dxe_core!patina_samples::component::hello_world::HelloStr │
+│ 3  ┆ /home/vineel/repos/patina/components/patina_samples/src/component/he ┆ 000001007E2797F0 ┆ 000001007E35076C ┆ qemu_armvirt_dxe_core!patina_samples::component::hello_world::HelloStr │
 │    ┆ llo_world.rs @ 23                                                    ┆                  ┆                  ┆ uct::entry_point(patina_samples::component::hello_world::HelloStruc │
 │    ┆                                                                      ┆                  ┆                  ┆ t, patina::component::params::Config<i32>)+0xC4                     │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 4  ┆ /home/vineel/repos/patina/sdk/patina/src/component/params.rs @ 254   ┆ 000001007E2798A0 ┆ 000001007E29CEFC ┆ qemu_sbsa_dxe_core!patina::component::params::impl$20::run<patina_s │
+│ 4  ┆ /home/vineel/repos/patina/sdk/patina/src/component/params.rs @ 254   ┆ 000001007E2798A0 ┆ 000001007E29CEFC ┆ qemu_armvirt_dxe_core!patina::component::params::impl$20::run<patina_s │
 │    ┆                                                                      ┆                  ┆                  ┆ amples::component::hello_world::HelloStruct,enum2$<core::result::Re │
 │    ┆                                                                      ┆                  ┆                  ┆ sult<tuple$<>,enum2$<patina::error::EfiError> > >,enum2$<core::resu │
 │    ┆                                                                      ┆                  ┆                  ┆ lt::Result<tuple$<>,enum2$<patina::error::EfiError> > > (*)(patina_ │
@@ -58,7 +58,7 @@ WARN -      10 000001007E279BC0      000001007E27BE24       qemu_sbsa_dxe_core+1
 │    ┆                                                                      ┆                  ┆                  ┆ n<patina_samples::component::hello_world::HelloStruct> >*,          │
 │    ┆                                                                      ┆                  ┆                  ┆ tuple$<patina::component::params::Config<i32> >)+0x18               │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 5  ┆ /home/vineel/repos/patina/sdk/patina/src/component/struct_component. ┆ 000001007E2798B0 ┆ 000001007E2A9CB0 ┆ qemu_sbsa_dxe_core!patina::component::struct_component::impl$1::run │
+│ 5  ┆ /home/vineel/repos/patina/sdk/patina/src/component/struct_component. ┆ 000001007E2798B0 ┆ 000001007E2A9CB0 ┆ qemu_armvirt_dxe_core!patina::component::struct_component::impl$1::run │
 │    ┆ rs @ 94                                                              ┆                  ┆                  ┆ _unsafe<tuple$<patina::component::params::RunOnce,enum2$<core::resu │
 │    ┆                                                                      ┆                  ┆                  ┆ lt::Result<tuple$<>,enum2$<patina::error::EfiError> > > (*)(patina_ │
 │    ┆                                                                      ┆                  ┆                  ┆ samples::component::hello_world::HelloStruct,patina::component::par │
@@ -74,12 +74,12 @@ WARN -      10 000001007E279BC0      000001007E27BE24       qemu_sbsa_dxe_core+1
 │    ┆                                                                      ┆                  ┆                  ┆ onent::hello_world::HelloStruct,patina::component::params::Config<i │
 │    ┆                                                                      ┆                  ┆                  ┆ 32>)>*, patina::component::storage::UnsafeStorageCell)+0x58         │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 6  ┆ /home/vineel/repos/patina/patina_dxe_core/src/lib.rs @ 371           ┆ 000001007E279920 ┆ 000001007E2A5EF8 ┆ qemu_sbsa_dxe_core!patina_dxe_core::impl$4::dispatch_components::cl │
+│ 6  ┆ /home/vineel/repos/patina/patina_dxe_core/src/lib.rs @ 371           ┆ 000001007E279920 ┆ 000001007E2A5EF8 ┆ qemu_armvirt_dxe_core!patina_dxe_core::impl$4::dispatch_components::cl │
 │    ┆                                                                      ┆                  ┆                  ┆ osure$0(patina_dxe_core::impl$4::dispatch_components::closure_env$0 │
 │    ┆                                                                      ┆                  ┆                  ┆ *, alloc::boxed::Box<dyn$<patina::component::Component>,alloc::allo │
 │    ┆                                                                      ┆                  ┆                  ┆ c::Global>*)+0xB8                                                   │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 7  ┆ /home/vineel/.rustup/toolchains/1.89.0-x86_64-unknown-linux-gnu/lib/ ┆ 000001007E279A00 ┆ 000001007E2A6628 ┆ qemu_sbsa_dxe_core!alloc::vec::impl$1::retain_mut::process_loop<pat │
+│ 7  ┆ /home/vineel/.rustup/toolchains/1.89.0-x86_64-unknown-linux-gnu/lib/ ┆ 000001007E279A00 ┆ 000001007E2A6628 ┆ qemu_armvirt_dxe_core!alloc::vec::impl$1::retain_mut::process_loop<pat │
 │    ┆ rustlib/src/rust/library/alloc/src/vec/mod.rs @ 2243                 ┆                  ┆                  ┆ ina_dxe_core::impl$4::dispatch_components::closure_env$0,alloc::box │
 │    ┆                                                                      ┆                  ┆                  ┆ ed::Box<dyn$<patina::component::Component>,alloc::alloc::Global>,al │
 │    ┆                                                                      ┆                  ┆                  ┆ loc::alloc::Global,true>(unsigned long long,                        │
@@ -88,17 +88,17 @@ WARN -      10 000001007E279BC0      000001007E27BE24       qemu_sbsa_dxe_core+1
 │    ┆                                                                      ┆                  ┆                  ┆ atina::component::Component>,alloc::alloc::Global>,alloc::alloc::Gl │
 │    ┆                                                                      ┆                  ┆                  ┆ obal>*)+0x68                                                        │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 8  ┆ /home/vineel/.rustup/toolchains/1.89.0-x86_64-unknown-linux-gnu/lib/ ┆ 000001007E279A90 ┆ 000001007E2895A4 ┆ qemu_sbsa_dxe_core!alloc::vec::Vec<alloc::boxed::Box<dyn$<patina::c │
+│ 8  ┆ /home/vineel/.rustup/toolchains/1.89.0-x86_64-unknown-linux-gnu/lib/ ┆ 000001007E279A90 ┆ 000001007E2895A4 ┆ qemu_armvirt_dxe_core!alloc::vec::Vec<alloc::boxed::Box<dyn$<patina::c │
 │    ┆ rustlib/src/rust/library/alloc/src/vec/mod.rs @ 2275                 ┆                  ┆                  ┆ omponent::Component>,alloc::alloc::Global>,alloc::alloc::Global>::r │
 │    ┆                                                                      ┆                  ┆                  ┆ etain_mut<alloc::boxed::Box<dyn$<patina::component::Component>,allo │
 │    ┆                                                                      ┆                  ┆                  ┆ c::alloc::Global>,alloc::alloc::Global,patina_dxe_core::impl$4::dis │
 │    ┆                                                                      ┆                  ┆                  ┆ patch_components::closure_env$0>(patina_dxe_core::impl$4::dispatch_ │
 │    ┆                                                                      ┆                  ┆                  ┆ components::closure_env$0)+0x44                                     │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 9  ┆ /home/vineel/repos/patina/patina_dxe_core/src/lib.rs @ 398           ┆ 000001007E279AD0 ┆ 000001007E28A1D8 ┆ qemu_sbsa_dxe_core!patina_dxe_core::Core<patina_dxe_core::Alloc>::c │
+│ 9  ┆ /home/vineel/repos/patina/patina_dxe_core/src/lib.rs @ 398           ┆ 000001007E279AD0 ┆ 000001007E28A1D8 ┆ qemu_armvirt_dxe_core!patina_dxe_core::Core<patina_dxe_core::Alloc>::c │
 │    ┆                                                                      ┆                  ┆                  ┆ ore_dispatcher()+0xA4                                               │
 ├╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┼╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌╌┤
-│ 10 ┆ /home/vineel/repos/patina/patina_dxe_core/src/lib.rs @ 555           ┆ 000001007E279BC0 ┆ 000001007E27BE24 ┆ qemu_sbsa_dxe_core!patina_dxe_core::Core<patina_dxe_core::Alloc>::s │
+│ 10 ┆ /home/vineel/repos/patina/patina_dxe_core/src/lib.rs @ 555           ┆ 000001007E279BC0 ┆ 000001007E27BE24 ┆ qemu_armvirt_dxe_core!patina_dxe_core::Core<patina_dxe_core::Alloc>::s │
 │    ┆                                                                      ┆                  ┆                  ┆ tart(patina_dxe_core::Core<patina_dxe_core::Alloc>)+0xAF4           │
 └────┴──────────────────────────────────────────────────────────────────────┴──────────────────┴──────────────────┴─────────────────────────────────────────────────────────────────────┘
 # cspell:enable
diff --git a/core/patina_stacktrace/src/aarch64/runtime_function.rs b/core/patina_stacktrace/src/aarch64/runtime_function.rs
index a90ff87fd..ac91c6985 100644
--- a/core/patina_stacktrace/src/aarch64/runtime_function.rs
+++ b/core/patina_stacktrace/src/aarch64/runtime_function.rs
@@ -228,12 +228,12 @@ impl<'a> RuntimeFunction<'a> {
                 // and retry the lookup. This ensures that we correctly resolve
                 // unwind data even when the return address falls inside such
                 // synthetic code.
-                // qemu_sbsa_dxe_core!patina_samples::component::hello_world::func3:
+                // qemu_armvirt_dxe_core!patina_samples::component::hello_world::func3:
                 // 00000100`0006aebc f81f0ffe str         lr,[sp,#-0x10]!
                 // 00000100`0006aec0 d100c3ff sub         sp,sp,#0x30
                 // ....
-                // 00000100`0006aeec 97fffb26 bl          qemu_sbsa_dxe_core!core::panicking::panic_fmt (00000100`00069b84)
-                // qemu_sbsa_dxe_core!weak.default._ZN118_$LT$$u5b$core..mem..maybe_uninit..MaybeUninit$LT$T$GT$$u5d$$u20$as$u20$core..array..iter..iter_inner..PartialDrop$GT$12partial_drop17hc3d15e0976616072E:
+                // 00000100`0006aeec 97fffb26 bl          qemu_armvirt_dxe_core!core::panicking::panic_fmt (00000100`00069b84)
+                // qemu_armvirt_dxe_core!weak.default._ZN118_$LT$$u5b$core..mem..maybe_uninit..MaybeUninit$LT$T$GT$$u5d$$u20$as$u20$core..array..iter..iter_inner..PartialDrop$GT$12partial_drop17hc3d15e0976616072E:
                 // 00000100`0006aef0 d37cedf0 lsl         xip0,x15,#4
                 // 00000100`0006aef4 910003f1 mov         xip1,sp
                 // 00000100`0006aef8 d1400631 sub         xip1,xip1,#1,lsl #0xC
diff --git a/core/patina_stacktrace/src/lib.rs b/core/patina_stacktrace/src/lib.rs
index bdfcdeb39..c6a6ef1e9 100644
--- a/core/patina_stacktrace/src/lib.rs
+++ b/core/patina_stacktrace/src/lib.rs
@@ -125,15 +125,15 @@
 //!    ///     # Child-SP              Return Address         Call Site
 //!    ///     0 0000010078885D50      000001007AB12770       Shell+66ED0
 //!    ///     1 0000010078885E90      0000010007B98DCC       Shell+6770
-//!    ///     2 0000010078885FF0      0000010007B98E54       qemu_sbsa_dxe_core+18DCC
-//!    ///     3 0000010007FFF4C0      0000010007B98F48       qemu_sbsa_dxe_core+18E54
-//!    ///     4 0000010007FFF800      000001007AF54D08       qemu_sbsa_dxe_core+18F48
+//!    ///     2 0000010078885FF0      0000010007B98E54       qemu_armvirt_dxe_core+18DCC
+//!    ///     3 0000010007FFF4C0      0000010007B98F48       qemu_armvirt_dxe_core+18E54
+//!    ///     4 0000010007FFF800      000001007AF54D08       qemu_armvirt_dxe_core+18F48
 //!    ///     5 0000010007FFFA90      0000010007BAC388       BdsDxe+8D08
-//!    ///     6 0000010007FFFF80      0000000010008878       qemu_sbsa_dxe_core+2C388 --.
-//!    ///                                                                               |
-//!    ///     0:000> u qemu_sbsa_dxe_core!patina_dxe_core::call_bds                     |
-//!    ///     00000000`1002c1b0 f81f0ff3 str x19,[sp,#-0x10]!                           |
-//!    ///     00000000`1002c1b4 f90007fe str lr,[sp,#8]     <---------------------------'
+//!    ///     6 0000010007FFFF80      0000000010008878       qemu_armvirt_dxe_core+2C388 --.
+//!    ///                                                                                  |
+//!    ///     0:000> u qemu_armvirt_dxe_core!patina_dxe_core::call_bds                     |
+//!    ///     00000000`1002c1b0 f81f0ff3 str x19,[sp,#-0x10]!                              |
+//!    ///     00000000`1002c1b4 f90007fe str lr,[sp,#8]     <------------------------------'
 //!    ///     00000000`1002c1b8 d10183ff sub sp,sp,#0x60
 //!    ///
 //!    ///     The FP is not saved, so the return address in frame #6 is garbage.
diff --git a/core/patina_stacktrace/src/stacktrace.rs b/core/patina_stacktrace/src/stacktrace.rs
index 6131ce501..9631e6794 100644
--- a/core/patina_stacktrace/src/stacktrace.rs
+++ b/core/patina_stacktrace/src/stacktrace.rs
@@ -218,15 +218,15 @@ impl StackTrace {
     ///     # Child-SP              Return Address         Call Site
     ///     0 0000010078885D50      000001007AB12770       Shell+66ED0
     ///     1 0000010078885E90      0000010007B98DCC       Shell+6770
-    ///     2 0000010078885FF0      0000010007B98E54       qemu_sbsa_dxe_core+18DCC
-    ///     3 0000010007FFF4C0      0000010007B98F48       qemu_sbsa_dxe_core+18E54
-    ///     4 0000010007FFF800      000001007AF54D08       qemu_sbsa_dxe_core+18F48
+    ///     2 0000010078885FF0      0000010007B98E54       qemu_armvirt_dxe_core+18DCC
+    ///     3 0000010007FFF4C0      0000010007B98F48       qemu_armvirt_dxe_core+18E54
+    ///     4 0000010007FFF800      000001007AF54D08       qemu_armvirt_dxe_core+18F48
     ///     5 0000010007FFFA90      0000010007BAC388       BdsDxe+8D08
-    ///     6 0000010007FFFF80      0000000010008878       qemu_sbsa_dxe_core+2C388 --.
-    ///                                                                               |
-    ///     0:000> u qemu_sbsa_dxe_core!patina_dxe_core::call_bds                     |
-    ///     00000000`1002c1b0 f81f0ff3 str x19,[sp,#-0x10]!                           |
-    ///     00000000`1002c1b4 f90007fe str lr,[sp,#8]     <---------------------------'
+    ///     6 0000010007FFFF80      0000000010008878       qemu_armvirt_dxe_core+2C388 --.
+    ///                                                                                  |
+    ///     0:000> u qemu_armvirt_dxe_core!patina_dxe_core::call_bds                     |
+    ///     00000000`1002c1b0 f81f0ff3 str x19,[sp,#-0x10]!                              |
+    ///     00000000`1002c1b4 f90007fe str lr,[sp,#8]     <------------------------------'
     ///     00000000`1002c1b8 d10183ff sub sp,sp,#0x60
     ///
     ///     The FP is not saved, so the return address in frame #6 is garbage.
diff --git a/docs/src/dev/testing/qemu_pr_validation.md b/docs/src/dev/testing/qemu_pr_validation.md
index 4448e2c9d..b0fbf79f0 100644
--- a/docs/src/dev/testing/qemu_pr_validation.md
+++ b/docs/src/dev/testing/qemu_pr_validation.md
@@ -46,7 +46,7 @@ The workflow relies on several repositories and components:
 | Platform | Host Operating System | Architecture |
 |:---------|:----------------------|:-------------|
 | Q35      | Linux                 | x86_64       |
-| SBSA     | Linux                 | aarch64      |
+| ArmVirt  | Linux                 | aarch64      |
 | Q35      | Windows               | x86_64       |
 
 At any given time, a subset of these platforms may be disabled due to known issues or maintenance work. The PR comment
@@ -123,7 +123,7 @@ The workflow is organized into the following jobs:
 ```mermaid
 flowchart TD
     N["Post In-Progress Notification Comment"] --> P["Preflight Checks"]
-    P -->|Ready| L["Validate QEMU (Linux): Q35 + SBSA"]
+    P -->|Ready| L["Validate QEMU (Linux): Q35 + ArmVirt"]
     P -->|Ready| W["Validate QEMU (Windows): Q35"]
     L --> M["Emit PR Metadata (Transfer State)"]
     W --> M
@@ -131,7 +131,7 @@ flowchart TD
 ```
 
 The Linux and Windows jobs run in parallel. Additionally, a matrix is used within the Linux job to further parallelize
-validation across the Q35 and SBSA platforms.
+validation across the Q35 and ArmVirt platforms.
 
 While full support is available for building and running on Linux and Windows hosts, there is not a significant
 advantage for doing so from a Patina firmware validation perspective. It may be decided to focus on Linux hosts in the
diff --git a/docs/src/integrate/dxe_core.md b/docs/src/integrate/dxe_core.md
index 0b990eb27..4ad67f24b 100644
--- a/docs/src/integrate/dxe_core.md
+++ b/docs/src/integrate/dxe_core.md
@@ -121,14 +121,14 @@ Reference: [q35_dxe_core.rs](https://github.com/OpenDevicePartnership/patina-dxe
 
 ### For AARCH64 Platforms
 
-Copy the SBSA reference implementation:
+Copy the ArmVirt reference implementation:
 
 ```txt
 > mkdir -p bin
-> cp <path-to-patina-dxe-core-qemu>/bin/sbsa_dxe_core.rs bin/platform_patina_dxe_core.rs
+> cp <path-to-patina-dxe-core-qemu>/bin/arm_virt_dxe_core.rs bin/platform_patina_dxe_core.rs
 ```
 
-Reference: [sbsa_dxe_core.rs](https://github.com/OpenDevicePartnership/patina-dxe-core-qemu/blob/main/bin/sbsa_dxe_core.rs)
+Reference: [arm_virt_dxe_core.rs](https://github.com/OpenDevicePartnership/patina-dxe-core-qemu/blob/main/bin/arm_virt_dxe_core.rs)
 
 > While the QEMU Patina DXE Core implementations provide a good starting point, you need to modify the copied file to
 > suit your platform's specific requirements.
diff --git a/docs/src/introduction.md b/docs/src/introduction.md
index 2a8e77903..e1c2bcefe 100644
--- a/docs/src/introduction.md
+++ b/docs/src/introduction.md
@@ -100,7 +100,7 @@ flowchart TD
 | [patina-fw-patcher](https://github.com/OpenDevicePartnership/patina-fw-patcher) | A developer tool to quickly patch a new patina-dxe-core binary into a platform's firmware |
 | [patina-mtrr](https://github.com/OpenDevicePartnership/patina-mtrr) | A x86_64 MTRR solution we believe is generic enough to be useful outside of Patina. |
 | [patina-paging](https://github.com/OpenDevicePartnership/patina-paging) | A paging solution we believe is generic enough to be useful outside of Patina. |
-| [patina-qemu](https://github.com/OpenDevicePartnership/patina-qemu/) | Two reference virtual platforms (Q35, SBSA) |
+| [patina-qemu](https://github.com/OpenDevicePartnership/patina-qemu/) | Two reference virtual platforms (Q35, ArmVirt) |
 | [patina-readiness-tool](https://github.com/OpenDevicePartnership/patina-readiness-tool) | A DXE core replacement binary that reviews HOBs passed from PEI to DXE to validate your platform is ready to use the Patina DXE Core. |
 | [patina](https://github.com/OpenDevicePartnership/patina) | Core codebase for Patina containing Patina-only crates. |
 <!-- markdownlint-enable MD013 -->
diff --git a/docs/src/patina.md b/docs/src/patina.md
index 4f3ef732b..4aeb0bbb4 100644
--- a/docs/src/patina.md
+++ b/docs/src/patina.md
@@ -180,7 +180,7 @@ definition but many of the services are still implemented in C so it is orange.
 #### Notable DXE Core Features
 
 - AARCH64 and x86/64 support.
-  - Support for QEMU (Q35 and SBSA).
+  - Support for QEMU (Q35 and ArmVirt).
   - Tested and developed on physical Intel and Arm hardware.
   - Boots to Windows and Linux on these platforms.
 - Performance record (FBPT) support.