diff --git a/.github/workflows/cargo-vet.yml b/.github/workflows/cargo-vet.yml index 864c138..98aca0a 100644 --- a/.github/workflows/cargo-vet.yml +++ b/.github/workflows/cargo-vet.yml @@ -16,7 +16,7 @@ jobs: name: vet-dependencies runs-on: ubuntu-latest env: - CARGO_VET_VERSION: 0.10.1 + CARGO_VET_VERSION: 0.10.2 steps: - uses: actions/checkout@v4 diff --git a/.github/workflows/check.yml b/.github/workflows/check.yml index 42d8b74..6499693 100644 --- a/.github/workflows/check.yml +++ b/.github/workflows/check.yml @@ -141,7 +141,7 @@ jobs: strategy: fail-fast: false matrix: - msrv: ["1.88"] + msrv: ["1.94"] name: ubuntu / ${{ matrix.msrv }} steps: - uses: actions/checkout@v4 diff --git a/.github/workflows/device-driver.yml b/.github/workflows/device-driver.yml index 9c7befe..8fdc3e6 100644 --- a/.github/workflows/device-driver.yml +++ b/.github/workflows/device-driver.yml @@ -21,8 +21,8 @@ jobs: uses: baptiste0928/cargo-install@v3 with: crate: device-driver-cli - - name: Generate device.rs from INA4230.toml - run: device-driver-cli --manifest INA4230.toml --device-name Device -o ci_gen.rs + - name: Generate device.rs from INA4230.ddsl + run: ddc build rust -s INA4230.ddsl -o ci_gen.rs --rust-defmt-feature=defmt - name: Format generated file run: rustfmt --edition 2024 ci_gen.rs - name: Check generated file matches committed src/device.rs diff --git a/Cargo.lock b/Cargo.lock index bdce83e..2650213 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -52,18 +52,9 @@ checksum = "9330f8b2ff13f34540b44e946ef35111825727b38d33286ef986142615121801" [[package]] name = "defmt" -version = "0.3.100" +version = "1.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f0963443817029b2024136fc4dd07a5107eb8f977eaf18fcd1fdeb11306b64ad" -dependencies = [ - "defmt 1.0.1", -] - -[[package]] -name = "defmt" -version = "1.0.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "548d977b6da32fa1d1fda2876453da1e7df63ad0304c8b3dae4dbe7b96f39b78" +checksum = "e2953bfe4f93bbd20cc71198842756f77d161884c99ebbabc41d80231ded88d1" dependencies = [ "bitflags", "defmt-macros", @@ -71,12 +62,11 @@ dependencies = [ [[package]] name = "defmt-macros" -version = "1.0.1" +version = "1.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3d4fc12a85bcf441cfe44344c4b72d58493178ce635338a3f3b78943aceb258e" +checksum = "bad9c72e7ca2137e0dc3813245a0d282fd6daad32fd800af018306a9169b5fe8" dependencies = [ "defmt-parser", - "proc-macro-error2", "proc-macro2", "quote", "syn", @@ -93,11 +83,11 @@ dependencies = [ [[package]] name = "device-driver" -version = "1.0.8" +version = "2.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3aa3d97b2acf349b9d52c75470e2ccfc7224c49597ec12c2fb0e28826e910495" +checksum = "2503fa8477e63231b485f927f7e578cf05de86ab8a883f6d7b401d8adcd169c4" dependencies = [ - "defmt 0.3.100", + "defmt", "embedded-io", "embedded-io-async", ] @@ -154,19 +144,20 @@ dependencies = [ [[package]] name = "embedded-io" -version = "0.6.1" +version = "0.7.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "edd0f118536f44f5ccd48bcb8b111bdc3de888b58c74639dfb034a357d0f206d" +checksum = "9eb1aa714776b75c7e67e1da744b81a129b3ff919c8712b5e1b32252c1f07cc7" dependencies = [ - "defmt 0.3.100", + "defmt", ] [[package]] name = "embedded-io-async" -version = "0.6.1" +version = "0.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3ff09972d4073aa8c299395be75161d582e7629cd663171d62af73c8d50dba3f" +checksum = "2564b9f813c544241430e147d8bc454815ef9ac998878d30cc3055449f7fd4c0" dependencies = [ + "defmt", "embedded-io", ] @@ -176,7 +167,7 @@ version = "0.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8c703756bee31e7aaf55d8fb6dcf7337cfc231cfb4a3ad34b9df509846fd9001" dependencies = [ - "defmt 1.0.1", + "defmt", "paste", ] @@ -186,7 +177,7 @@ version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "3e51dce2828cbbbca20bd69857628584deccae0fa4e7724f3fceb5d197bdffb0" dependencies = [ - "defmt 1.0.1", + "defmt", "embedded-sensors-hal", "paste", ] @@ -210,7 +201,7 @@ checksum = "e629b9b98ef3dd8afe6ca2bd0f89306cec16d43d907889945bc5d6687f2f13c7" name = "ina4230" version = "0.1.0" dependencies = [ - "defmt 1.0.1", + "defmt", "device-driver", "embedded-hal-async", "embedded-hal-mock", @@ -337,28 +328,6 @@ version = "0.2.17" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "a89322df9ebe1c1578d689c92318e070967d1042b512afbe49518723f4e6d5cd" -[[package]] -name = "proc-macro-error-attr2" -version = "2.0.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "96de42df36bb9bba5542fe9f1a054b8cc87e172759a1868aa05c1f3acc89dfc5" -dependencies = [ - "proc-macro2", - "quote", -] - -[[package]] -name = "proc-macro-error2" -version = "2.0.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "11ec05c52be0a07b08061f7dd003e7d7092e0472bc731b4af7bb1ef876109802" -dependencies = [ - "proc-macro-error-attr2", - "proc-macro2", - "quote", - "syn", -] - [[package]] name = "proc-macro2" version = "1.0.106" diff --git a/Cargo.toml b/Cargo.toml index 9bb130e..1503145 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -13,7 +13,7 @@ edition = "2024" rust-version = "1.88" [dependencies] -device-driver = { version = "1.0.7", default-features = false } +device-driver = "2.1.0" defmt = { version = "1.0", optional = true } embedded-hal-async = "1.0.0" embedded-sensors-hal-async = "0.4.0" @@ -23,7 +23,6 @@ embedded-hal-mock = { version = "0.11.1", features = ["embedded-hal-async"] } tokio = { version = "=1.45.0", features = ["rt", "macros"] } - [lints.rust] unsafe_code = "deny" missing_docs = "deny" @@ -36,8 +35,4 @@ style = "forbid" pedantic = "deny" [features] -defmt = [ - "dep:defmt", - "device-driver/defmt-03", - "embedded-sensors-hal-async/defmt", -] +defmt = ["dep:defmt", "device-driver/defmt", "embedded-sensors-hal-async/defmt"] diff --git a/INA4230.ddsl b/INA4230.ddsl new file mode 100644 index 0000000..9c96836 --- /dev/null +++ b/INA4230.ddsl @@ -0,0 +1,512 @@ +device Device { + default-byte-order: BE, + register-address-type: u8, + word-boundaries: "-", + default-access: RW, + + /// Configuration register 1 + register config-1 { + address: 0x20, + reset: 0xF127, + fields: fieldset _ { + size-bytes: 2, + + /// Active channel enable bits. Bit15=CH4, Bit14=CH3, Bit13=CH2, Bit12=CH1 + field active-channel 15:12, + /// Number of ADC conversion results to average + field avg 11:9 -> _ as + /// Averaging count + enum averaging { + num-1: 0, + num-4: 1, + num-16: 2, + num-64: 3, + num-128: 4, + num-256: 5, + num-512: 6, + num-1024: 7, + }, + /// Bus voltage conversion time + field vbusct 8:6 -> _ as + /// Bus voltage conversion time + enum bus-conversion-time { + us-140: 0, + us-204: 1, + us-332: 2, + us-588: 3, + us-1100: 4, + us-2116: 5, + us-4156: 6, + us-8244: 7, + }, + /// Shunt voltage conversion time + field vshct 5:3 -> _ as + /// Shunt voltage conversion time + enum shunt-conversion-time { + us-140: 0, + us-204: 1, + us-332: 2, + us-588: 3, + us-1100: 4, + us-2116: 5, + us-4156: 6, + us-8244: 7, + }, + /// Operating mode + field mode 2:0 -> _ as + /// Operating mode + enum mode { + shutdown: 0, + shunt-triggered: 1, + bus-triggered: 2, + shunt-and-bus-triggered: 3, + shutdown-2: 4, + continuous-shunt: 5, + continuous-bus: 6, + continuous-shunt-and-bus: 7, + }, + }, + }, + /// Configuration register 2 + register config-2 { + address: 0x21, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// System reset. Set to 1 to reset all registers to default. Self-clears. + field rst 15, + /// Energy accumulator reset per channel. Bit11=CH4, Bit10=CH3, Bit9=CH2, Bit8=CH1. Bits self-clear after write. + field acc-rst 11:8, + /// Conversion ready flag on ALERT pin enable + field cnvr-mask 7, + /// Energy overflow alert enable + field enof-mask 6, + /// Alert pin latch enable. When set, alert latches until flags register is read. + field alert-latch 5, + /// Alert pin polarity + field alert-pol 4 -> _ as enum alert-polarity { + active-low: 0, + active-high: 1, + }, + /// Shunt full scale input range per channel. Bit3=CH4, Bit2=CH3, Bit1=CH2, Bit0=CH1. 0=±81.92mV, 1=±20.48mV + field range 3:0, + }, + }, + /// Calibration register channel 1 + register calibration-ch-1 { + address: 0x05, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Shunt calibration value for current conversion + field shunt-cal 14:0, + }, + }, + /// Calibration register channel 2 + register calibration-ch-2 { + address: 0x0D, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Shunt calibration value for current conversion + field shunt-cal 14:0, + }, + }, + /// Calibration register channel 3 + register calibration-ch-3 { + address: 0x15, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Shunt calibration value for current conversion + field shunt-cal 14:0, + }, + }, + /// Calibration register channel 4 + register calibration-ch-4 { + address: 0x1D, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Shunt calibration value for current conversion + field shunt-cal 14:0, + }, + }, + /// Alert configuration register 1 + register alert-config-1 { + address: 0x07, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Channel assignment for this alert + field channel 4:3 -> _ as enum alert-channel { + ch1: 0, + ch2: 1, + ch3: 2, + ch4: 3, + }, + /// Active alert function selection + field alert-mask 2:0 -> _ as enum alert-function { + none: 0, + shunt-over-limit: 1, + shunt-under-limit: 2, + bus-over-limit: 3, + bus-under-limit: 4, + power-over-limit: 5, + reserved-6: 6, + reserved-7: 7, + }, + }, + }, + /// Alert configuration register 2 + register alert-config-2 { + address: 0x0F, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Channel assignment for this alert + field channel 4:3, + /// Active alert function selection + field alert-mask 2:0, + }, + }, + /// Alert configuration register 3 + register alert-config-3 { + address: 0x17, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Channel assignment for this alert + field channel 4:3, + /// Active alert function selection + field alert-mask 2:0, + }, + }, + /// Alert configuration register 4 + register alert-config-4 { + address: 0x1F, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Channel assignment for this alert + field channel 4:3, + /// Active alert function selection + field alert-mask 2:0, + }, + }, + /// Alert limit register 1. Format matches corresponding result register. + register alert-limit-1 { + address: 0x06, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Alert threshold. Shunt=signed 16-bit, Bus=unsigned 15-bit, Power=unsigned 16-bit + field limit 15:0, + }, + }, + /// Alert limit register 2 + register alert-limit-2 { + address: 0x0E, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Alert threshold + field limit 15:0, + }, + }, + /// Alert limit register 3 + register alert-limit-3 { + address: 0x16, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Alert threshold + field limit 15:0, + }, + }, + /// Alert limit register 4 + register alert-limit-4 { + address: 0x1E, + reset: 0x00, + fields: fieldset _ { + size-bytes: 2, + + /// Alert threshold + field limit 15:0, + }, + }, + /// Shunt voltage channel 1. 2's complement. LSB = 2.5uV (range=0) or 625nV (range=1) + register shunt-voltage-ch-1 { + address: 0x00, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Differential shunt voltage, 2's complement + field vshunt 15:0, + }, + }, + /// Shunt voltage channel 2 + register shunt-voltage-ch-2 { + address: 0x08, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Differential shunt voltage, 2's complement + field vshunt 15:0, + }, + }, + /// Shunt voltage channel 3 + register shunt-voltage-ch-3 { + address: 0x10, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Differential shunt voltage, 2's complement + field vshunt 15:0, + }, + }, + /// Shunt voltage channel 4 + register shunt-voltage-ch-4 { + address: 0x18, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Differential shunt voltage, 2's complement + field vshunt 15:0, + }, + }, + /// Bus voltage channel 1. Always positive. LSB = 1.6mV + register bus-voltage-ch-1 { + address: 0x01, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Bus voltage, always positive, 2's complement format + field vbus 15:0, + }, + }, + /// Bus voltage channel 2 + register bus-voltage-ch-2 { + address: 0x09, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Bus voltage + field vbus 15:0, + }, + }, + /// Bus voltage channel 3 + register bus-voltage-ch-3 { + address: 0x11, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Bus voltage + field vbus 15:0, + }, + }, + /// Bus voltage channel 4 + register bus-voltage-ch-4 { + address: 0x19, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Bus voltage + field vbus 15:0, + }, + }, + /// Current channel 1. Value [A] = CURRENT_LSB x register_value + register current-ch-1 { + address: 0x02, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated current in amperes, 2's complement + field current 15:0, + }, + }, + /// Current channel 2 + register current-ch-2 { + address: 0x0A, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated current in amperes, 2's complement + field current 15:0, + }, + }, + /// Current channel 3 + register current-ch-3 { + address: 0x12, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated current in amperes, 2's complement + field current 15:0, + }, + }, + /// Current channel 4 + register current-ch-4 { + address: 0x1A, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated current in amperes, 2's complement + field current 15:0, + }, + }, + /// Power channel 1. Value [W] = 32 x CURRENT_LSB x register_value. Unsigned. + register power-ch-1 { + address: 0x03, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated power in watts, unsigned + field power 15:0, + }, + }, + /// Power channel 2 + register power-ch-2 { + address: 0x0B, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated power in watts, unsigned + field power 15:0, + }, + }, + /// Power channel 3 + register power-ch-3 { + address: 0x13, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated power in watts, unsigned + field power 15:0, + }, + }, + /// Power channel 4 + register power-ch-4 { + address: 0x1B, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Calculated power in watts, unsigned + field power 15:0, + }, + }, + /// Energy channel 1. Value [J] = 32 x CURRENT_LSB x register_value. Unsigned. + register energy-ch-1 { + address: 0x04, + access: RO, + fields: fieldset _ { + size-bytes: 4, + + /// Accumulated energy in joules, unsigned + field energy 31:0, + }, + }, + /// Energy channel 2 + register energy-ch-2 { + address: 0x0C, + access: RO, + fields: fieldset _ { + size-bytes: 4, + + /// Accumulated energy in joules, unsigned + field energy 31:0, + }, + }, + /// Energy channel 3 + register energy-ch-3 { + address: 0x14, + access: RO, + fields: fieldset _ { + size-bytes: 4, + + /// Accumulated energy in joules, unsigned + field energy 31:0, + }, + }, + /// Energy channel 4 + register energy-ch-4 { + address: 0x1C, + access: RO, + fields: fieldset _ { + size-bytes: 4, + + /// Accumulated energy in joules, unsigned + field energy 31:0, + }, + }, + /// Flags register + register flags { + address: 0x22, + reset: 0x00, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Alert limit 4 exceeded + field limit4-alert 15, + /// Alert limit 3 exceeded + field limit3-alert 14, + /// Alert limit 2 exceeded + field limit2-alert 13, + /// Alert limit 1 exceeded + field limit1-alert 12, + /// Energy register overflow channel 4 + field energyof-ch4 11, + /// Energy register overflow channel 3 + field energyof-ch3 10, + /// Energy register overflow channel 2 + field energyof-ch2 9, + /// Energy register overflow channel 1 + field energyof-ch1 8, + /// Conversion ready flag. Set when all conversions and averaging complete. Cleared by writing CONFIG1 or reading FLAGS. + field cvrf 7, + /// Math overflow flag. Indicates current and power data may be invalid. + field ovf 6, + }, + }, + /// Manufacturer ID. Reads back 0x5449 ('TI' in ASCII) + register manufacturer-id { + address: 0x7E, + reset: 0x5449, + access: RO, + fields: fieldset _ { + size-bytes: 2, + + /// Manufacturer ID + field id 15:0, + }, + }, +} \ No newline at end of file diff --git a/INA4230.toml b/INA4230.toml deleted file mode 100644 index 592c962..0000000 --- a/INA4230.toml +++ /dev/null @@ -1,751 +0,0 @@ -[config] -register_address_type = "u8" -default_byte_order = "BE" -name_word_boundaries = ["Hyphen"] -defmt_feature = "defmt" -# ============================================================ -# CONFIG1 Register (Address = 0x20, Reset = 0xF127) -# ============================================================ - -[config1] -type = "register" -address = 0x20 -size_bits = 16 -access = "RW" -reset_value = 0xF127 -description = "Configuration register 1" - -[config1.fields.active-channel] -description = "Active channel enable bits. Bit15=CH4, Bit14=CH3, Bit13=CH2, Bit12=CH1" -base = "uint" -start = 12 -end = 16 - -[config1.fields.avg] -description = "Number of ADC conversion results to average" -base = "uint" -start = 9 -end = 12 - -[config1.fields.avg.conversion] -name = "averaging" -description = "Averaging count" -_1 = 0 -_4 = 1 -_16 = 2 -_64 = 3 -_128 = 4 -_256 = 5 -_512 = 6 -_1024 = 7 - -[config1.fields.vbusct] -description = "Bus voltage conversion time" -base = "uint" -start = 6 -end = 9 - -[config1.fields.vbusct.conversion] -name = "bus-conversion-time" -description = "Bus voltage conversion time" -_140-us = 0 -_204-us = 1 -_332-us = 2 -_588-us = 3 -_1100-us = 4 -_2116-us = 5 -_4156-us = 6 -_8244-us = 7 - -[config1.fields.vshct] -description = "Shunt voltage conversion time" -base = "uint" -start = 3 -end = 6 - -[config1.fields.vshct.conversion] -name = "shunt-conversion-time" -description = "Shunt voltage conversion time" -_140-us = 0 -_204-us = 1 -_332-us = 2 -_588-us = 3 -_1100-us = 4 -_2116-us = 5 -_4156-us = 6 -_8244-us = 7 - -[config1.fields.mode] -description = "Operating mode" -base = "uint" -start = 0 -end = 3 - -[config1.fields.mode.conversion] -name = "mode" -description = "Operating mode" -shutdown = 0 -shunt-triggered = 1 -bus-triggered = 2 -shunt-and-bus-triggered = 3 -shutdown-2 = 4 -continuous-shunt = 5 -continuous-bus = 6 -continuous-shunt-and-bus = 7 - -# ============================================================ -# CONFIG2 Register (Address = 0x21, Reset = 0x0000) -# ============================================================ - -[config2] -type = "register" -address = 0x21 -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Configuration register 2" - -[config2.fields.rst] -description = "System reset. Set to 1 to reset all registers to default. Self-clears." -base = "bool" -start = 15 -end = 16 - -[config2.fields.acc-rst] -description = "Energy accumulator reset per channel. Bit11=CH4, Bit10=CH3, Bit9=CH2, Bit8=CH1. Bits self-clear after write." -base = "uint" -start = 8 -end = 12 - -[config2.fields.cnvr-mask] -description = "Conversion ready flag on ALERT pin enable" -base = "bool" -start = 7 -end = 8 - -[config2.fields.enof-mask] -description = "Energy overflow alert enable" -base = "bool" -start = 6 -end = 7 - -[config2.fields.alert-latch] -description = "Alert pin latch enable. When set, alert latches until flags register is read." -base = "bool" -start = 5 -end = 6 - -[config2.fields.alert-pol] -description = "Alert pin polarity" -base = "uint" -start = 4 -end = 5 - -[config2.fields.alert-pol.conversion] -name = "alert-polarity" -active-low = 0 -active-high = 1 - -[config2.fields.range] -description = "Shunt full scale input range per channel. Bit3=CH4, Bit2=CH3, Bit1=CH2, Bit0=CH1. 0=±81.92mV, 1=±20.48mV" -base = "uint" -start = 0 -end = 4 - -# ============================================================ -# CALIBRATION Registers (per channel) -# ============================================================ - -[calibration-ch1] -type = "register" -address = 0x05 -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Calibration register channel 1" - -[calibration-ch1.fields.shunt-cal] -description = "Shunt calibration value for current conversion" -base = "uint" -start = 0 -end = 15 - -[calibration-ch2] -type = "register" -address = 0x0D -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Calibration register channel 2" - -[calibration-ch2.fields.shunt-cal] -description = "Shunt calibration value for current conversion" -base = "uint" -start = 0 -end = 15 - -[calibration-ch3] -type = "register" -address = 0x15 -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Calibration register channel 3" - -[calibration-ch3.fields.shunt-cal] -description = "Shunt calibration value for current conversion" -base = "uint" -start = 0 -end = 15 - -[calibration-ch4] -type = "register" -address = 0x1D -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Calibration register channel 4" - -[calibration-ch4.fields.shunt-cal] -description = "Shunt calibration value for current conversion" -base = "uint" -start = 0 -end = 15 - -# ============================================================ -# ALERT_CONFIG Registers (per alert slot) -# ============================================================ - -[alert-config-1] -type = "register" -address = 0x07 -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert configuration register 1" - -[alert-config-1.fields.channel] -description = "Channel assignment for this alert" -base = "uint" -start = 3 -end = 5 - -[alert-config-1.fields.channel.conversion] -name = "alert-channel" -ch1 = 0 -ch2 = 1 -ch3 = 2 -ch4 = 3 - -[alert-config-1.fields.alert-mask] -description = "Active alert function selection" -base = "uint" -start = 0 -end = 3 - -[alert-config-1.fields.alert-mask.conversion] -name = "alert-function" -none = 0 -shunt-over-limit = 1 -shunt-under-limit = 2 -bus-over-limit = 3 -bus-under-limit = 4 -power-over-limit = 5 -reserved-6 = 6 -reserved-7 = 7 - -[alert-config-2] -type = "register" -address = 0x0F -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert configuration register 2" - -[alert-config-2.fields.channel] -description = "Channel assignment for this alert" -base = "uint" -start = 3 -end = 5 - - -[alert-config-2.fields.alert-mask] -description = "Active alert function selection" -base = "uint" -start = 0 -end = 3 - - -[alert-config-3] -type = "register" -address = 0x17 -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert configuration register 3" - -[alert-config-3.fields.channel] -description = "Channel assignment for this alert" -base = "uint" -start = 3 -end = 5 - - -[alert-config-3.fields.alert-mask] -description = "Active alert function selection" -base = "uint" -start = 0 -end = 3 - - -[alert-config-4] -type = "register" -address = 0x1F -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert configuration register 4" - -[alert-config-4.fields.channel] -description = "Channel assignment for this alert" -base = "uint" -start = 3 -end = 5 - - -[alert-config-4.fields.alert-mask] -description = "Active alert function selection" -base = "uint" -start = 0 -end = 3 - - -# ============================================================ -# ALERT_LIMIT Registers (per alert slot) -# ============================================================ - -[alert-limit-1] -type = "register" -address = 0x06 -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert limit register 1. Format matches corresponding result register." - -[alert-limit-1.fields.limit] -description = "Alert threshold. Shunt=signed 16-bit, Bus=unsigned 15-bit, Power=unsigned 16-bit" -base = "uint" -start = 0 -end = 16 - -[alert-limit-2] -type = "register" -address = 0x0E -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert limit register 2" - -[alert-limit-2.fields.limit] -description = "Alert threshold" -base = "uint" -start = 0 -end = 16 - -[alert-limit-3] -type = "register" -address = 0x16 -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert limit register 3" - -[alert-limit-3.fields.limit] -description = "Alert threshold" -base = "uint" -start = 0 -end = 16 - -[alert-limit-4] -type = "register" -address = 0x1E -size_bits = 16 -access = "RW" -reset_value = 0x0000 -description = "Alert limit register 4" - -[alert-limit-4.fields.limit] -description = "Alert threshold" -base = "uint" -start = 0 -end = 16 - -# ============================================================ -# SHUNT_VOLTAGE Registers (per channel, read-only) -# ============================================================ - -[shunt-voltage-ch1] -type = "register" -address = 0x00 -size_bits = 16 -access = "RO" -description = "Shunt voltage channel 1. 2's complement. LSB = 2.5uV (range=0) or 625nV (range=1)" - -[shunt-voltage-ch1.fields.vshunt] -description = "Differential shunt voltage, 2's complement" -base = "uint" -start = 0 -end = 16 - -[shunt-voltage-ch2] -type = "register" -address = 0x08 -size_bits = 16 -access = "RO" -description = "Shunt voltage channel 2" - -[shunt-voltage-ch2.fields.vshunt] -description = "Differential shunt voltage, 2's complement" -base = "uint" -start = 0 -end = 16 - -[shunt-voltage-ch3] -type = "register" -address = 0x10 -size_bits = 16 -access = "RO" -description = "Shunt voltage channel 3" - -[shunt-voltage-ch3.fields.vshunt] -description = "Differential shunt voltage, 2's complement" -base = "uint" -start = 0 -end = 16 - -[shunt-voltage-ch4] -type = "register" -address = 0x18 -size_bits = 16 -access = "RO" -description = "Shunt voltage channel 4" - -[shunt-voltage-ch4.fields.vshunt] -description = "Differential shunt voltage, 2's complement" -base = "uint" -start = 0 -end = 16 - -# ============================================================ -# BUS_VOLTAGE Registers (per channel, read-only) -# ============================================================ - -[bus-voltage-ch1] -type = "register" -address = 0x01 -size_bits = 16 -access = "RO" -description = "Bus voltage channel 1. Always positive. LSB = 1.6mV" - -[bus-voltage-ch1.fields.vbus] -description = "Bus voltage, always positive, 2's complement format" -base = "uint" -start = 0 -end = 16 - -[bus-voltage-ch2] -type = "register" -address = 0x09 -size_bits = 16 -access = "RO" -description = "Bus voltage channel 2" - -[bus-voltage-ch2.fields.vbus] -description = "Bus voltage" -base = "uint" -start = 0 -end = 16 - -[bus-voltage-ch3] -type = "register" -address = 0x11 -size_bits = 16 -access = "RO" -description = "Bus voltage channel 3" - -[bus-voltage-ch3.fields.vbus] -description = "Bus voltage" -base = "uint" -start = 0 -end = 16 - -[bus-voltage-ch4] -type = "register" -address = 0x19 -size_bits = 16 -access = "RO" -description = "Bus voltage channel 4" - -[bus-voltage-ch4.fields.vbus] -description = "Bus voltage" -base = "uint" -start = 0 -end = 16 - -# ============================================================ -# CURRENT Registers (per channel, read-only) -# ============================================================ - -[current-ch1] -type = "register" -address = 0x02 -size_bits = 16 -access = "RO" -description = "Current channel 1. Value [A] = CURRENT_LSB x register_value" - -[current-ch1.fields.current] -description = "Calculated current in amperes, 2's complement" -base = "uint" -start = 0 -end = 16 - -[current-ch2] -type = "register" -address = 0x0A -size_bits = 16 -access = "RO" -description = "Current channel 2" - -[current-ch2.fields.current] -description = "Calculated current in amperes, 2's complement" -base = "uint" -start = 0 -end = 16 - -[current-ch3] -type = "register" -address = 0x12 -size_bits = 16 -access = "RO" -description = "Current channel 3" - -[current-ch3.fields.current] -description = "Calculated current in amperes, 2's complement" -base = "uint" -start = 0 -end = 16 - -[current-ch4] -type = "register" -address = 0x1A -size_bits = 16 -access = "RO" -description = "Current channel 4" - -[current-ch4.fields.current] -description = "Calculated current in amperes, 2's complement" -base = "uint" -start = 0 -end = 16 - -# ============================================================ -# POWER Registers (per channel, read-only) -# ============================================================ - -[power-ch1] -type = "register" -address = 0x03 -size_bits = 16 -access = "RO" -description = "Power channel 1. Value [W] = 32 x CURRENT_LSB x register_value. Unsigned." - -[power-ch1.fields.power] -description = "Calculated power in watts, unsigned" -base = "uint" -start = 0 -end = 16 - -[power-ch2] -type = "register" -address = 0x0B -size_bits = 16 -access = "RO" -description = "Power channel 2" - -[power-ch2.fields.power] -description = "Calculated power in watts, unsigned" -base = "uint" -start = 0 -end = 16 - -[power-ch3] -type = "register" -address = 0x13 -size_bits = 16 -access = "RO" -description = "Power channel 3" - -[power-ch3.fields.power] -description = "Calculated power in watts, unsigned" -base = "uint" -start = 0 -end = 16 - -[power-ch4] -type = "register" -address = 0x1B -size_bits = 16 -access = "RO" -description = "Power channel 4" - -[power-ch4.fields.power] -description = "Calculated power in watts, unsigned" -base = "uint" -start = 0 -end = 16 - -# ============================================================ -# ENERGY Registers (per channel, read-only, 32-bit) -# ============================================================ - -[energy-ch1] -type = "register" -address = 0x04 -size_bits = 32 -access = "RO" -description = "Energy channel 1. Value [J] = 32 x CURRENT_LSB x register_value. Unsigned." - -[energy-ch1.fields.energy] -description = "Accumulated energy in joules, unsigned" -base = "uint" -start = 0 -end = 32 - -[energy-ch2] -type = "register" -address = 0x0C -size_bits = 32 -access = "RO" -description = "Energy channel 2" - -[energy-ch2.fields.energy] -description = "Accumulated energy in joules, unsigned" -base = "uint" -start = 0 -end = 32 - -[energy-ch3] -type = "register" -address = 0x14 -size_bits = 32 -access = "RO" -description = "Energy channel 3" - -[energy-ch3.fields.energy] -description = "Accumulated energy in joules, unsigned" -base = "uint" -start = 0 -end = 32 - -[energy-ch4] -type = "register" -address = 0x1C -size_bits = 32 -access = "RO" -description = "Energy channel 4" - -[energy-ch4.fields.energy] -description = "Accumulated energy in joules, unsigned" -base = "uint" -start = 0 -end = 32 - -# ============================================================ -# FLAGS Register (Address = 0x22, read-only) -# ============================================================ - -[flags] -type = "register" -address = 0x22 -size_bits = 16 -access = "RO" -reset_value = 0x0000 -description = "Flags register" - -[flags.fields.limit4-alert] -description = "Alert limit 4 exceeded" -base = "bool" -start = 15 -end = 16 - -[flags.fields.limit3-alert] -description = "Alert limit 3 exceeded" -base = "bool" -start = 14 -end = 15 - -[flags.fields.limit2-alert] -description = "Alert limit 2 exceeded" -base = "bool" -start = 13 -end = 14 - -[flags.fields.limit1-alert] -description = "Alert limit 1 exceeded" -base = "bool" -start = 12 -end = 13 - -[flags.fields.energyof-ch4] -description = "Energy register overflow channel 4" -base = "bool" -start = 11 -end = 12 - -[flags.fields.energyof-ch3] -description = "Energy register overflow channel 3" -base = "bool" -start = 10 -end = 11 - -[flags.fields.energyof-ch2] -description = "Energy register overflow channel 2" -base = "bool" -start = 9 -end = 10 - -[flags.fields.energyof-ch1] -description = "Energy register overflow channel 1" -base = "bool" -start = 8 -end = 9 - -[flags.fields.cvrf] -description = "Conversion ready flag. Set when all conversions and averaging complete. Cleared by writing CONFIG1 or reading FLAGS." -base = "bool" -start = 7 -end = 8 - -[flags.fields.ovf] -description = "Math overflow flag. Indicates current and power data may be invalid." -base = "bool" -start = 6 -end = 7 - -# ============================================================ -# MANUFACTURER_ID Register (Address = 0x7E, read-only) -# ============================================================ - -[manufacturer-id] -type = "register" -address = 0x7E -size_bits = 16 -access = "RO" -reset_value = 0x5449 -description = "Manufacturer ID. Reads back 0x5449 ('TI' in ASCII)" - -[manufacturer-id.fields.id] -description = "Manufacturer ID" -base = "uint" -start = 0 -end = 16 diff --git a/README.md b/README.md index 21b9bd8..1eb41d1 100644 --- a/README.md +++ b/README.md @@ -100,9 +100,9 @@ coarse. The INA4230 supports two shunt input voltage ranges, configured via `AdcRange`: | `AdcRange` | Full-scale range | LSB | -|--------------------|-----------------|--------| -| `Range0` (default) | ±81.92 mV | 2.5 µV | -| `Range1` | ±20.48 mV | 625 nV | +| ------------------ | ---------------- | ------ | +| `Range0` (default) | ±81.92 mV | 2.5 µV | +| `Range1` | ±20.48 mV | 625 nV | `Range0` is the default and suits most applications. Use `Range1` for higher resolution when measuring small currents through a large shunt resistor. @@ -198,7 +198,7 @@ let sensor = Ina4230::new(i2c, AddrPinState::Vs, AddrPinState::Sda); All 16 address combinations (per datasheet Table 6-1): | A0 | A1 | Address | -|-----|-----|---------| +| --- | --- | ------- | | GND | GND | `0x40` | | VS | GND | `0x41` | | GND | SDA | `0x42` | @@ -227,7 +227,7 @@ cp generated.rs src/device.rs ## MSRV -Rust `1.88` and up. +Rust `1.94` and up. ## License diff --git a/src/device.rs b/src/device.rs index 655ac21..fb37f20 100644 --- a/src/device.rs +++ b/src/device.rs @@ -1,5725 +1,5401 @@ +// This code was generated using device-driver `2.1.0` (), +// a tool distributed under MIT OR Apache-2.0 by Dion Dokter +// +// For more information about device-driver, visit the website: https://device-driver.com + /// Root block of the Device driver #[derive(Debug)] pub struct Device { - pub(crate) interface: I, + interface: I, #[doc(hidden)] + #[allow(unused)] base_address: u8, } impl Device { - /// Create a new instance of the block based on device interface + /// Create a new instance of the device pub const fn new(interface: I) -> Self { Self { interface, base_address: 0, } } - /// A reference to the interface used to communicate with the device - pub(crate) fn interface(&mut self) -> &mut I { - &mut self.interface + /// Drop the driver instance and reclaim the interface + pub fn free(self) -> I { + self.interface } - /// Read all readable register values in this block from the device. - /// The callback is called for each of them. - /// Any registers in child blocks are not included. - /// - /// The callback has three arguments: - /// - /// - The address of the register - /// - The name of the register (with index for repeated registers) - /// - The read value from the register + /// Configuration register 1 /// - /// This is useful for e.g. debug printing all values. - /// The given [field_sets::FieldSetValue] has a Debug and Format implementation that forwards to the concrete type - /// the lies within so it can be printed without matching on it. - #[allow(unused_mut)] - #[allow(unused_variables)] - pub fn read_all_registers( - &mut self, - mut callback: impl FnMut(u8, &'static str, field_sets::FieldSetValue), - ) -> Result<(), I::Error> - where - I: ::device_driver::RegisterInterface, - { - let reg = self.config_1().read()?; - callback(32 + 0 * 0, "config_1", reg.into()); - let reg = self.config_2().read()?; - callback(33 + 0 * 0, "config_2", reg.into()); - let reg = self.calibration_ch_1().read()?; - callback(5 + 0 * 0, "calibration_ch_1", reg.into()); - let reg = self.calibration_ch_2().read()?; - callback(13 + 0 * 0, "calibration_ch_2", reg.into()); - let reg = self.calibration_ch_3().read()?; - callback(21 + 0 * 0, "calibration_ch_3", reg.into()); - let reg = self.calibration_ch_4().read()?; - callback(29 + 0 * 0, "calibration_ch_4", reg.into()); - let reg = self.alert_config_1().read()?; - callback(7 + 0 * 0, "alert_config_1", reg.into()); - let reg = self.alert_config_2().read()?; - callback(15 + 0 * 0, "alert_config_2", reg.into()); - let reg = self.alert_config_3().read()?; - callback(23 + 0 * 0, "alert_config_3", reg.into()); - let reg = self.alert_config_4().read()?; - callback(31 + 0 * 0, "alert_config_4", reg.into()); - let reg = self.alert_limit_1().read()?; - callback(6 + 0 * 0, "alert_limit_1", reg.into()); - let reg = self.alert_limit_2().read()?; - callback(14 + 0 * 0, "alert_limit_2", reg.into()); - let reg = self.alert_limit_3().read()?; - callback(22 + 0 * 0, "alert_limit_3", reg.into()); - let reg = self.alert_limit_4().read()?; - callback(30 + 0 * 0, "alert_limit_4", reg.into()); - let reg = self.shunt_voltage_ch_1().read()?; - callback(0 + 0 * 0, "shunt_voltage_ch_1", reg.into()); - let reg = self.shunt_voltage_ch_2().read()?; - callback(8 + 0 * 0, "shunt_voltage_ch_2", reg.into()); - let reg = self.shunt_voltage_ch_3().read()?; - callback(16 + 0 * 0, "shunt_voltage_ch_3", reg.into()); - let reg = self.shunt_voltage_ch_4().read()?; - callback(24 + 0 * 0, "shunt_voltage_ch_4", reg.into()); - let reg = self.bus_voltage_ch_1().read()?; - callback(1 + 0 * 0, "bus_voltage_ch_1", reg.into()); - let reg = self.bus_voltage_ch_2().read()?; - callback(9 + 0 * 0, "bus_voltage_ch_2", reg.into()); - let reg = self.bus_voltage_ch_3().read()?; - callback(17 + 0 * 0, "bus_voltage_ch_3", reg.into()); - let reg = self.bus_voltage_ch_4().read()?; - callback(25 + 0 * 0, "bus_voltage_ch_4", reg.into()); - let reg = self.current_ch_1().read()?; - callback(2 + 0 * 0, "current_ch_1", reg.into()); - let reg = self.current_ch_2().read()?; - callback(10 + 0 * 0, "current_ch_2", reg.into()); - let reg = self.current_ch_3().read()?; - callback(18 + 0 * 0, "current_ch_3", reg.into()); - let reg = self.current_ch_4().read()?; - callback(26 + 0 * 0, "current_ch_4", reg.into()); - let reg = self.power_ch_1().read()?; - callback(3 + 0 * 0, "power_ch_1", reg.into()); - let reg = self.power_ch_2().read()?; - callback(11 + 0 * 0, "power_ch_2", reg.into()); - let reg = self.power_ch_3().read()?; - callback(19 + 0 * 0, "power_ch_3", reg.into()); - let reg = self.power_ch_4().read()?; - callback(27 + 0 * 0, "power_ch_4", reg.into()); - let reg = self.energy_ch_1().read()?; - callback(4 + 0 * 0, "energy_ch_1", reg.into()); - let reg = self.energy_ch_2().read()?; - callback(12 + 0 * 0, "energy_ch_2", reg.into()); - let reg = self.energy_ch_3().read()?; - callback(20 + 0 * 0, "energy_ch_3", reg.into()); - let reg = self.energy_ch_4().read()?; - callback(28 + 0 * 0, "energy_ch_4", reg.into()); - let reg = self.flags().read()?; - callback(34 + 0 * 0, "flags", reg.into()); - let reg = self.manufacturer_id().read()?; - callback(126 + 0 * 0, "manufacturer_id", reg.into()); - Ok(()) - } - /// Read all readable register values in this block from the device. - /// The callback is called for each of them. - /// Any registers in child blocks are not included. - /// - /// The callback has three arguments: - /// - /// - The address of the register - /// - The name of the register (with index for repeated registers) - /// - The read value from the register - /// - /// This is useful for e.g. debug printing all values. - /// The given [field_sets::FieldSetValue] has a Debug and Format implementation that forwards to the concrete type - /// the lies within so it can be printed without matching on it. - #[allow(unused_mut)] - #[allow(unused_variables)] - pub async fn read_all_registers_async( - &mut self, - mut callback: impl FnMut(u8, &'static str, field_sets::FieldSetValue), - ) -> Result<(), I::Error> + /// Register operation: + /// - Address: `32` + /// - Reset value: `0xF127` + #[doc(alias = "config-1")] + pub fn config_1(&mut self) -> ::device_driver::RegisterOperation<'_, Self, Config1, u8, ::device_driver::RW, ()> where - I: ::device_driver::AsyncRegisterInterface, + I: ::device_driver::RegisterInterfaceBase, { - let reg = self.config_1().read_async().await?; - callback(32 + 0 * 0, "config_1", reg.into()); - let reg = self.config_2().read_async().await?; - callback(33 + 0 * 0, "config_2", reg.into()); - let reg = self.calibration_ch_1().read_async().await?; - callback(5 + 0 * 0, "calibration_ch_1", reg.into()); - let reg = self.calibration_ch_2().read_async().await?; - callback(13 + 0 * 0, "calibration_ch_2", reg.into()); - let reg = self.calibration_ch_3().read_async().await?; - callback(21 + 0 * 0, "calibration_ch_3", reg.into()); - let reg = self.calibration_ch_4().read_async().await?; - callback(29 + 0 * 0, "calibration_ch_4", reg.into()); - let reg = self.alert_config_1().read_async().await?; - callback(7 + 0 * 0, "alert_config_1", reg.into()); - let reg = self.alert_config_2().read_async().await?; - callback(15 + 0 * 0, "alert_config_2", reg.into()); - let reg = self.alert_config_3().read_async().await?; - callback(23 + 0 * 0, "alert_config_3", reg.into()); - let reg = self.alert_config_4().read_async().await?; - callback(31 + 0 * 0, "alert_config_4", reg.into()); - let reg = self.alert_limit_1().read_async().await?; - callback(6 + 0 * 0, "alert_limit_1", reg.into()); - let reg = self.alert_limit_2().read_async().await?; - callback(14 + 0 * 0, "alert_limit_2", reg.into()); - let reg = self.alert_limit_3().read_async().await?; - callback(22 + 0 * 0, "alert_limit_3", reg.into()); - let reg = self.alert_limit_4().read_async().await?; - callback(30 + 0 * 0, "alert_limit_4", reg.into()); - let reg = self.shunt_voltage_ch_1().read_async().await?; - callback(0 + 0 * 0, "shunt_voltage_ch_1", reg.into()); - let reg = self.shunt_voltage_ch_2().read_async().await?; - callback(8 + 0 * 0, "shunt_voltage_ch_2", reg.into()); - let reg = self.shunt_voltage_ch_3().read_async().await?; - callback(16 + 0 * 0, "shunt_voltage_ch_3", reg.into()); - let reg = self.shunt_voltage_ch_4().read_async().await?; - callback(24 + 0 * 0, "shunt_voltage_ch_4", reg.into()); - let reg = self.bus_voltage_ch_1().read_async().await?; - callback(1 + 0 * 0, "bus_voltage_ch_1", reg.into()); - let reg = self.bus_voltage_ch_2().read_async().await?; - callback(9 + 0 * 0, "bus_voltage_ch_2", reg.into()); - let reg = self.bus_voltage_ch_3().read_async().await?; - callback(17 + 0 * 0, "bus_voltage_ch_3", reg.into()); - let reg = self.bus_voltage_ch_4().read_async().await?; - callback(25 + 0 * 0, "bus_voltage_ch_4", reg.into()); - let reg = self.current_ch_1().read_async().await?; - callback(2 + 0 * 0, "current_ch_1", reg.into()); - let reg = self.current_ch_2().read_async().await?; - callback(10 + 0 * 0, "current_ch_2", reg.into()); - let reg = self.current_ch_3().read_async().await?; - callback(18 + 0 * 0, "current_ch_3", reg.into()); - let reg = self.current_ch_4().read_async().await?; - callback(26 + 0 * 0, "current_ch_4", reg.into()); - let reg = self.power_ch_1().read_async().await?; - callback(3 + 0 * 0, "power_ch_1", reg.into()); - let reg = self.power_ch_2().read_async().await?; - callback(11 + 0 * 0, "power_ch_2", reg.into()); - let reg = self.power_ch_3().read_async().await?; - callback(19 + 0 * 0, "power_ch_3", reg.into()); - let reg = self.power_ch_4().read_async().await?; - callback(27 + 0 * 0, "power_ch_4", reg.into()); - let reg = self.energy_ch_1().read_async().await?; - callback(4 + 0 * 0, "energy_ch_1", reg.into()); - let reg = self.energy_ch_2().read_async().await?; - callback(12 + 0 * 0, "energy_ch_2", reg.into()); - let reg = self.energy_ch_3().read_async().await?; - callback(20 + 0 * 0, "energy_ch_3", reg.into()); - let reg = self.energy_ch_4().read_async().await?; - callback(28 + 0 * 0, "energy_ch_4", reg.into()); - let reg = self.flags().read_async().await?; - callback(34 + 0 * 0, "flags", reg.into()); - let reg = self.manufacturer_id().read_async().await?; - callback(126 + 0 * 0, "manufacturer_id", reg.into()); - Ok(()) - } - /// Configuration register 1 - pub fn config_1( - &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::Config1, ::device_driver::RW> { let address = self.base_address + 32; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::Config1, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::Config1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || Config1::from([241, 39])) } /// Configuration register 2 - pub fn config_2( - &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::Config2, ::device_driver::RW> { + /// + /// Register operation: + /// - Address: `33` + /// - Reset value: `0x00` + #[doc(alias = "config-2")] + pub fn config_2(&mut self) -> ::device_driver::RegisterOperation<'_, Self, Config2, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 33; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::Config2, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::Config2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || Config2::from([0, 0])) } /// Calibration register channel 1 + /// + /// Register operation: + /// - Address: `5` + /// - Reset value: `0x00` + #[doc(alias = "calibration-ch-1")] pub fn calibration_ch_1( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CalibrationCh1, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, CalibrationCh1, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 5; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CalibrationCh1, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::CalibrationCh1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || CalibrationCh1::from([0, 0])) } /// Calibration register channel 2 + /// + /// Register operation: + /// - Address: `13` + /// - Reset value: `0x00` + #[doc(alias = "calibration-ch-2")] pub fn calibration_ch_2( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CalibrationCh2, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, CalibrationCh2, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 13; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CalibrationCh2, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::CalibrationCh2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || CalibrationCh2::from([0, 0])) } /// Calibration register channel 3 + /// + /// Register operation: + /// - Address: `21` + /// - Reset value: `0x00` + #[doc(alias = "calibration-ch-3")] pub fn calibration_ch_3( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CalibrationCh3, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, CalibrationCh3, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 21; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CalibrationCh3, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::CalibrationCh3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || CalibrationCh3::from([0, 0])) } /// Calibration register channel 4 + /// + /// Register operation: + /// - Address: `29` + /// - Reset value: `0x00` + #[doc(alias = "calibration-ch-4")] pub fn calibration_ch_4( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CalibrationCh4, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, CalibrationCh4, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 29; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CalibrationCh4, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::CalibrationCh4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || CalibrationCh4::from([0, 0])) } /// Alert configuration register 1 + /// + /// Register operation: + /// - Address: `7` + /// - Reset value: `0x00` + #[doc(alias = "alert-config-1")] pub fn alert_config_1( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertConfig1, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertConfig1, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 7; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertConfig1, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertConfig1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertConfig1::from([0, 0])) } /// Alert configuration register 2 + /// + /// Register operation: + /// - Address: `15` + /// - Reset value: `0x00` + #[doc(alias = "alert-config-2")] pub fn alert_config_2( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertConfig2, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertConfig2, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 15; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertConfig2, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertConfig2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertConfig2::from([0, 0])) } /// Alert configuration register 3 + /// + /// Register operation: + /// - Address: `23` + /// - Reset value: `0x00` + #[doc(alias = "alert-config-3")] pub fn alert_config_3( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertConfig3, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertConfig3, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 23; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertConfig3, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertConfig3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertConfig3::from([0, 0])) } /// Alert configuration register 4 + /// + /// Register operation: + /// - Address: `31` + /// - Reset value: `0x00` + #[doc(alias = "alert-config-4")] pub fn alert_config_4( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertConfig4, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertConfig4, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 31; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertConfig4, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertConfig4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertConfig4::from([0, 0])) } /// Alert limit register 1. Format matches corresponding result register. + /// + /// Register operation: + /// - Address: `6` + /// - Reset value: `0x00` + #[doc(alias = "alert-limit-1")] pub fn alert_limit_1( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertLimit1, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertLimit1, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 6; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertLimit1, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertLimit1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertLimit1::from([0, 0])) } /// Alert limit register 2 + /// + /// Register operation: + /// - Address: `14` + /// - Reset value: `0x00` + #[doc(alias = "alert-limit-2")] pub fn alert_limit_2( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertLimit2, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertLimit2, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 14; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertLimit2, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertLimit2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertLimit2::from([0, 0])) } /// Alert limit register 3 + /// + /// Register operation: + /// - Address: `22` + /// - Reset value: `0x00` + #[doc(alias = "alert-limit-3")] pub fn alert_limit_3( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertLimit3, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertLimit3, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 22; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertLimit3, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertLimit3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertLimit3::from([0, 0])) } /// Alert limit register 4 + /// + /// Register operation: + /// - Address: `30` + /// - Reset value: `0x00` + #[doc(alias = "alert-limit-4")] pub fn alert_limit_4( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::AlertLimit4, ::device_driver::RW> { + ) -> ::device_driver::RegisterOperation<'_, Self, AlertLimit4, u8, ::device_driver::RW, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 30; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::AlertLimit4, ::device_driver::RW>::new( - self.interface(), - address as u8, - field_sets::AlertLimit4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || AlertLimit4::from([0, 0])) } /// Shunt voltage channel 1. 2's complement. LSB = 2.5uV (range=0) or 625nV (range=1) + /// + /// Register operation: + /// - Address: `0` + /// - Reset value: `0` + #[doc(alias = "shunt-voltage-ch-1")] pub fn shunt_voltage_ch_1( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::ShuntVoltageCh1, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, ShuntVoltageCh1, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 0; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::ShuntVoltageCh1, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::ShuntVoltageCh1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, ShuntVoltageCh1::default) } /// Shunt voltage channel 2 + /// + /// Register operation: + /// - Address: `8` + /// - Reset value: `0` + #[doc(alias = "shunt-voltage-ch-2")] pub fn shunt_voltage_ch_2( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::ShuntVoltageCh2, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, ShuntVoltageCh2, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 8; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::ShuntVoltageCh2, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::ShuntVoltageCh2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, ShuntVoltageCh2::default) } /// Shunt voltage channel 3 + /// + /// Register operation: + /// - Address: `16` + /// - Reset value: `0` + #[doc(alias = "shunt-voltage-ch-3")] pub fn shunt_voltage_ch_3( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::ShuntVoltageCh3, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, ShuntVoltageCh3, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 16; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::ShuntVoltageCh3, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::ShuntVoltageCh3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, ShuntVoltageCh3::default) } /// Shunt voltage channel 4 + /// + /// Register operation: + /// - Address: `24` + /// - Reset value: `0` + #[doc(alias = "shunt-voltage-ch-4")] pub fn shunt_voltage_ch_4( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::ShuntVoltageCh4, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, ShuntVoltageCh4, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 24; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::ShuntVoltageCh4, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::ShuntVoltageCh4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, ShuntVoltageCh4::default) } /// Bus voltage channel 1. Always positive. LSB = 1.6mV + /// + /// Register operation: + /// - Address: `1` + /// - Reset value: `0` + #[doc(alias = "bus-voltage-ch-1")] pub fn bus_voltage_ch_1( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::BusVoltageCh1, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, BusVoltageCh1, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 1; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::BusVoltageCh1, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::BusVoltageCh1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, BusVoltageCh1::default) } /// Bus voltage channel 2 + /// + /// Register operation: + /// - Address: `9` + /// - Reset value: `0` + #[doc(alias = "bus-voltage-ch-2")] pub fn bus_voltage_ch_2( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::BusVoltageCh2, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, BusVoltageCh2, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 9; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::BusVoltageCh2, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::BusVoltageCh2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, BusVoltageCh2::default) } /// Bus voltage channel 3 + /// + /// Register operation: + /// - Address: `17` + /// - Reset value: `0` + #[doc(alias = "bus-voltage-ch-3")] pub fn bus_voltage_ch_3( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::BusVoltageCh3, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, BusVoltageCh3, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 17; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::BusVoltageCh3, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::BusVoltageCh3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, BusVoltageCh3::default) } /// Bus voltage channel 4 + /// + /// Register operation: + /// - Address: `25` + /// - Reset value: `0` + #[doc(alias = "bus-voltage-ch-4")] pub fn bus_voltage_ch_4( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::BusVoltageCh4, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, BusVoltageCh4, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 25; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::BusVoltageCh4, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::BusVoltageCh4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, BusVoltageCh4::default) } /// Current channel 1. Value [A] = CURRENT_LSB x register_value + /// + /// Register operation: + /// - Address: `2` + /// - Reset value: `0` + #[doc(alias = "current-ch-1")] pub fn current_ch_1( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CurrentCh1, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, CurrentCh1, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 2; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CurrentCh1, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::CurrentCh1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, CurrentCh1::default) } /// Current channel 2 + /// + /// Register operation: + /// - Address: `10` + /// - Reset value: `0` + #[doc(alias = "current-ch-2")] pub fn current_ch_2( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CurrentCh2, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, CurrentCh2, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 10; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CurrentCh2, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::CurrentCh2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, CurrentCh2::default) } /// Current channel 3 + /// + /// Register operation: + /// - Address: `18` + /// - Reset value: `0` + #[doc(alias = "current-ch-3")] pub fn current_ch_3( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CurrentCh3, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, CurrentCh3, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 18; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CurrentCh3, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::CurrentCh3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, CurrentCh3::default) } /// Current channel 4 + /// + /// Register operation: + /// - Address: `26` + /// - Reset value: `0` + #[doc(alias = "current-ch-4")] pub fn current_ch_4( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::CurrentCh4, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, CurrentCh4, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 26; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::CurrentCh4, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::CurrentCh4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, CurrentCh4::default) } /// Power channel 1. Value [W] = 32 x CURRENT_LSB x register_value. Unsigned. - pub fn power_ch_1( - &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::PowerCh1, ::device_driver::RO> { + /// + /// Register operation: + /// - Address: `3` + /// - Reset value: `0` + #[doc(alias = "power-ch-1")] + pub fn power_ch_1(&mut self) -> ::device_driver::RegisterOperation<'_, Self, PowerCh1, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 3; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::PowerCh1, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::PowerCh1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, PowerCh1::default) } /// Power channel 2 - pub fn power_ch_2( - &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::PowerCh2, ::device_driver::RO> { + /// + /// Register operation: + /// - Address: `11` + /// - Reset value: `0` + #[doc(alias = "power-ch-2")] + pub fn power_ch_2(&mut self) -> ::device_driver::RegisterOperation<'_, Self, PowerCh2, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 11; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::PowerCh2, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::PowerCh2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, PowerCh2::default) } /// Power channel 3 - pub fn power_ch_3( - &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::PowerCh3, ::device_driver::RO> { + /// + /// Register operation: + /// - Address: `19` + /// - Reset value: `0` + #[doc(alias = "power-ch-3")] + pub fn power_ch_3(&mut self) -> ::device_driver::RegisterOperation<'_, Self, PowerCh3, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 19; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::PowerCh3, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::PowerCh3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, PowerCh3::default) } /// Power channel 4 - pub fn power_ch_4( - &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::PowerCh4, ::device_driver::RO> { + /// + /// Register operation: + /// - Address: `27` + /// - Reset value: `0` + #[doc(alias = "power-ch-4")] + pub fn power_ch_4(&mut self) -> ::device_driver::RegisterOperation<'_, Self, PowerCh4, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 27; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::PowerCh4, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::PowerCh4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, PowerCh4::default) } /// Energy channel 1. Value [J] = 32 x CURRENT_LSB x register_value. Unsigned. + /// + /// Register operation: + /// - Address: `4` + /// - Reset value: `0` + #[doc(alias = "energy-ch-1")] pub fn energy_ch_1( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::EnergyCh1, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, EnergyCh1, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 4; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::EnergyCh1, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::EnergyCh1::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, EnergyCh1::default) } /// Energy channel 2 + /// + /// Register operation: + /// - Address: `12` + /// - Reset value: `0` + #[doc(alias = "energy-ch-2")] pub fn energy_ch_2( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::EnergyCh2, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, EnergyCh2, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 12; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::EnergyCh2, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::EnergyCh2::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, EnergyCh2::default) } /// Energy channel 3 + /// + /// Register operation: + /// - Address: `20` + /// - Reset value: `0` + #[doc(alias = "energy-ch-3")] pub fn energy_ch_3( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::EnergyCh3, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, EnergyCh3, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 20; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::EnergyCh3, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::EnergyCh3::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, EnergyCh3::default) } /// Energy channel 4 + /// + /// Register operation: + /// - Address: `28` + /// - Reset value: `0` + #[doc(alias = "energy-ch-4")] pub fn energy_ch_4( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::EnergyCh4, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, EnergyCh4, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 28; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::EnergyCh4, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::EnergyCh4::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, EnergyCh4::default) } /// Flags register - pub fn flags(&mut self) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::Flags, ::device_driver::RO> { + /// + /// Register operation: + /// - Address: `34` + /// - Reset value: `0x00` + pub fn flags(&mut self) -> ::device_driver::RegisterOperation<'_, Self, Flags, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 34; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::Flags, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::Flags::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || Flags::from([0, 0])) } /// Manufacturer ID. Reads back 0x5449 ('TI' in ASCII) + /// + /// Register operation: + /// - Address: `126` + /// - Reset value: `0x5449` + #[doc(alias = "manufacturer-id")] pub fn manufacturer_id( &mut self, - ) -> ::device_driver::RegisterOperation<'_, I, u8, field_sets::ManufacturerId, ::device_driver::RO> { + ) -> ::device_driver::RegisterOperation<'_, Self, ManufacturerId, u8, ::device_driver::RO, ()> + where + I: ::device_driver::RegisterInterfaceBase, + { let address = self.base_address + 126; - ::device_driver::RegisterOperation::<'_, I, u8, field_sets::ManufacturerId, ::device_driver::RO>::new( - self.interface(), - address as u8, - field_sets::ManufacturerId::new, - ) + ::device_driver::RegisterOperation::new(self, address as u8, || ManufacturerId::from([84, 73])) } } -/// Module containing the generated fieldsets of the registers and commands -pub mod field_sets { - #[allow(unused_imports)] - use super::*; - /// Configuration register 1 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Config1 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for Config1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } - } - impl Config1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [241, 39] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `active_channel` field of the register. - /// - /// Active channel enable bits. Bit15=CH4, Bit14=CH3, Bit13=CH2, Bit12=CH1 - pub fn active_channel(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 12, 16) }; - raw - } - ///Read the `avg` field of the register. - /// - /// Number of ADC conversion results to average - pub fn avg(&self) -> super::Averaging { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 9, 12) }; - unsafe { raw.try_into().unwrap_unchecked() } - } - ///Read the `vbusct` field of the register. - /// - /// Bus voltage conversion time - pub fn vbusct(&self) -> super::BusConversionTime { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 6, 9) }; - unsafe { raw.try_into().unwrap_unchecked() } - } - ///Read the `vshct` field of the register. - /// - /// Shunt voltage conversion time - pub fn vshct(&self) -> super::ShuntConversionTime { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 3, 6) }; - unsafe { raw.try_into().unwrap_unchecked() } - } - ///Read the `mode` field of the register. - /// - /// Operating mode - pub fn mode(&self) -> super::Mode { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 3) }; - unsafe { raw.try_into().unwrap_unchecked() } - } - ///Write the `active_channel` field of the register. - /// - /// Active channel enable bits. Bit15=CH4, Bit14=CH3, Bit13=CH2, Bit12=CH1 - pub fn set_active_channel(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 12, 16, &mut self.bits) }; - } - ///Write the `avg` field of the register. - /// - /// Number of ADC conversion results to average - pub fn set_avg(&mut self, value: super::Averaging) { - let raw = value.into(); - unsafe { ::device_driver::ops::store_lsb0::(raw, 9, 12, &mut self.bits) }; - } - ///Write the `vbusct` field of the register. - /// - /// Bus voltage conversion time - pub fn set_vbusct(&mut self, value: super::BusConversionTime) { - let raw = value.into(); - unsafe { ::device_driver::ops::store_lsb0::(raw, 6, 9, &mut self.bits) }; - } - ///Write the `vshct` field of the register. - /// - /// Shunt voltage conversion time - pub fn set_vshct(&mut self, value: super::ShuntConversionTime) { - let raw = value.into(); - unsafe { ::device_driver::ops::store_lsb0::(raw, 3, 6, &mut self.bits) }; - } - ///Write the `mode` field of the register. - /// - /// Operating mode - pub fn set_mode(&mut self, value: super::Mode) { - let raw = value.into(); - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 3, &mut self.bits) }; - } - } - impl From<[u8; 2]> for Config1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } - } - impl From for [u8; 2] { - fn from(val: Config1) -> Self { - val.bits - } - } - impl core::fmt::Debug for Config1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("Config1"); - d.field("active_channel", &self.active_channel()); - d.field("avg", &self.avg()); - d.field("vbusct", &self.vbusct()); - d.field("vshct", &self.vshct()); - d.field("mode", &self.mode()); - d.finish() - } - } - #[cfg(feature = "defmt")] - impl defmt::Format for Config1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "Config1 {{ "); - defmt::write!(f, "active_channel: {=u8}, ", &self.active_channel()); - defmt::write!(f, "avg: {}, ", &self.avg()); - defmt::write!(f, "vbusct: {}, ", &self.vbusct()); - defmt::write!(f, "vshct: {}, ", &self.vshct()); - defmt::write!(f, "mode: {}, ", &self.mode()); - defmt::write!(f, "}}"); - } - } - impl core::ops::BitAnd for Config1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } - } - impl core::ops::BitAndAssign for Config1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } - } - impl core::ops::BitOr for Config1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } - } - impl core::ops::BitOrAssign for Config1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } - } - impl core::ops::BitXor for Config1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } - } - impl core::ops::BitXorAssign for Config1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +impl ::device_driver::Block for Device { + type Interface = I; + type RegisterAddressType = u8; + type CommandAddressType = u8; + type BufferAddressType = u8; + type RegisterAddressMode = (); + fn interface(&mut self) -> &mut Self::Interface { + &mut self.interface } - impl core::ops::Not for Config1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +#[doc(alias = "manufacturer-id")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct ManufacturerId { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for ManufacturerId { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl ManufacturerId { + /// `15:0` - Read the `id` field. + /// + /// Manufacturer ID + #[must_use] + pub fn id(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `id` field. + /// + /// Manufacturer ID + pub fn set_id(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - /// Configuration register 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Config2 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for Config2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } - } - impl Config2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `rst` field of the register. - /// - /// System reset. Set to 1 to reset all registers to default. Self-clears. - pub fn rst(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 15, 16) }; - raw > 0 - } - ///Read the `acc_rst` field of the register. - /// - /// Energy accumulator reset per channel. Bit11=CH4, Bit10=CH3, Bit9=CH2, Bit8=CH1. Bits self-clear after write. - pub fn acc_rst(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 8, 12) }; - raw - } - ///Read the `cnvr_mask` field of the register. - /// - /// Conversion ready flag on ALERT pin enable - pub fn cnvr_mask(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 7, 8) }; - raw > 0 - } - ///Read the `enof_mask` field of the register. - /// - /// Energy overflow alert enable - pub fn enof_mask(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 6, 7) }; - raw > 0 - } - ///Read the `alert_latch` field of the register. - /// - /// Alert pin latch enable. When set, alert latches until flags register is read. - pub fn alert_latch(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 5, 6) }; - raw > 0 - } - ///Read the `alert_pol` field of the register. - /// - /// Alert pin polarity - pub fn alert_pol(&self) -> super::AlertPolarity { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 4, 5) }; - unsafe { raw.try_into().unwrap_unchecked() } - } - ///Read the `range` field of the register. - /// - /// Shunt full scale input range per channel. Bit3=CH4, Bit2=CH3, Bit1=CH2, Bit0=CH1. 0=±81.92mV, 1=±20.48mV - pub fn range(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 4) }; - raw - } - ///Write the `rst` field of the register. - /// - /// System reset. Set to 1 to reset all registers to default. Self-clears. - pub fn set_rst(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 15, 16, &mut self.bits) }; - } - ///Write the `acc_rst` field of the register. - /// - /// Energy accumulator reset per channel. Bit11=CH4, Bit10=CH3, Bit9=CH2, Bit8=CH1. Bits self-clear after write. - pub fn set_acc_rst(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 8, 12, &mut self.bits) }; - } - ///Write the `cnvr_mask` field of the register. - /// - /// Conversion ready flag on ALERT pin enable - pub fn set_cnvr_mask(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 7, 8, &mut self.bits) }; - } - ///Write the `enof_mask` field of the register. - /// - /// Energy overflow alert enable - pub fn set_enof_mask(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 6, 7, &mut self.bits) }; - } - ///Write the `alert_latch` field of the register. - /// - /// Alert pin latch enable. When set, alert latches until flags register is read. - pub fn set_alert_latch(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 5, 6, &mut self.bits) }; - } - ///Write the `alert_pol` field of the register. - /// - /// Alert pin polarity - pub fn set_alert_pol(&mut self, value: super::AlertPolarity) { - let raw = value.into(); - unsafe { ::device_driver::ops::store_lsb0::(raw, 4, 5, &mut self.bits) }; - } - ///Write the `range` field of the register. - /// - /// Shunt full scale input range per channel. Bit3=CH4, Bit2=CH3, Bit1=CH2, Bit0=CH1. 0=±81.92mV, 1=±20.48mV - pub fn set_range(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 4, &mut self.bits) }; - } - } - impl From<[u8; 2]> for Config2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } - } - impl From for [u8; 2] { - fn from(val: Config2) -> Self { - val.bits - } - } - impl core::fmt::Debug for Config2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("Config2"); - d.field("rst", &self.rst()); - d.field("acc_rst", &self.acc_rst()); - d.field("cnvr_mask", &self.cnvr_mask()); - d.field("enof_mask", &self.enof_mask()); - d.field("alert_latch", &self.alert_latch()); - d.field("alert_pol", &self.alert_pol()); - d.field("range", &self.range()); - d.finish() - } - } - #[cfg(feature = "defmt")] - impl defmt::Format for Config2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "Config2 {{ "); - defmt::write!(f, "rst: {=bool}, ", &self.rst()); - defmt::write!(f, "acc_rst: {=u8}, ", &self.acc_rst()); - defmt::write!(f, "cnvr_mask: {=bool}, ", &self.cnvr_mask()); - defmt::write!(f, "enof_mask: {=bool}, ", &self.enof_mask()); - defmt::write!(f, "alert_latch: {=bool}, ", &self.alert_latch()); - defmt::write!(f, "alert_pol: {}, ", &self.alert_pol()); - defmt::write!(f, "range: {=u8}, ", &self.range()); - defmt::write!(f, "}}"); - } - } - impl core::ops::BitAnd for Config2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } - } - impl core::ops::BitAndAssign for Config2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } - } - impl core::ops::BitOr for Config2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } - } - impl core::ops::BitOrAssign for Config2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } - } - impl core::ops::BitXor for Config2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } - } - impl core::ops::BitXorAssign for Config2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } - } - impl core::ops::Not for Config2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl Default for ManufacturerId { + fn default() -> Self { + ::ZERO } - /// Calibration register channel 1 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CalibrationCh1 { - /// The internal bits - bits: [u8; 2], +} +impl From<[u8; 2]> for ManufacturerId { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl ::device_driver::FieldSet for CalibrationCh1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl From for [u8; 2] { + fn from(val: ManufacturerId) -> Self { + val.bits } - impl CalibrationCh1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn shunt_cal(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 15) }; - raw - } - ///Write the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn set_shunt_cal(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 15, &mut self.bits) }; - } +} +impl core::fmt::Debug for ManufacturerId { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("ManufacturerId"); + d.field("id", &self.id()); + d.finish() } - impl From<[u8; 2]> for CalibrationCh1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for ManufacturerId { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "ManufacturerId {{ "); + defmt::write!(f, "id: {=u16}, ", &self.id()); + defmt::write!(f, "}}"); } - impl From for [u8; 2] { - fn from(val: CalibrationCh1) -> Self { - val.bits - } +} +impl core::ops::BitAnd for ManufacturerId { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::fmt::Debug for CalibrationCh1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CalibrationCh1"); - d.field("shunt_cal", &self.shunt_cal()); - d.finish() +} +impl core::ops::BitAndAssign for ManufacturerId { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - #[cfg(feature = "defmt")] - impl defmt::Format for CalibrationCh1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CalibrationCh1 {{ "); - defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitOr for ManufacturerId { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitAnd for CalibrationCh1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitOrAssign for ManufacturerId { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitAndAssign for CalibrationCh1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl core::ops::BitXor for ManufacturerId { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitOr for CalibrationCh1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::BitXorAssign for ManufacturerId { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitOrAssign for CalibrationCh1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::Not for ManufacturerId { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitXor for CalibrationCh1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +#[doc(alias = "flags")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct Flags { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for Flags { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl Flags { + /// `bit 15` - Read the `limit4_alert` field. + /// + /// Alert limit 4 exceeded + #[doc(alias = "limit4-alert")] + #[must_use] + pub fn limit4_alert(&self) -> bool { + let start = 15; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 14` - Read the `limit3_alert` field. + /// + /// Alert limit 3 exceeded + #[doc(alias = "limit3-alert")] + #[must_use] + pub fn limit3_alert(&self) -> bool { + let start = 14; + let end = 14; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 13` - Read the `limit2_alert` field. + /// + /// Alert limit 2 exceeded + #[doc(alias = "limit2-alert")] + #[must_use] + pub fn limit2_alert(&self) -> bool { + let start = 13; + let end = 13; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 12` - Read the `limit1_alert` field. + /// + /// Alert limit 1 exceeded + #[doc(alias = "limit1-alert")] + #[must_use] + pub fn limit1_alert(&self) -> bool { + let start = 12; + let end = 12; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 11` - Read the `energyof_ch4` field. + /// + /// Energy register overflow channel 4 + #[doc(alias = "energyof-ch4")] + #[must_use] + pub fn energyof_ch4(&self) -> bool { + let start = 11; + let end = 11; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 10` - Read the `energyof_ch3` field. + /// + /// Energy register overflow channel 3 + #[doc(alias = "energyof-ch3")] + #[must_use] + pub fn energyof_ch3(&self) -> bool { + let start = 10; + let end = 10; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 9` - Read the `energyof_ch2` field. + /// + /// Energy register overflow channel 2 + #[doc(alias = "energyof-ch2")] + #[must_use] + pub fn energyof_ch2(&self) -> bool { + let start = 9; + let end = 9; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 8` - Read the `energyof_ch1` field. + /// + /// Energy register overflow channel 1 + #[doc(alias = "energyof-ch1")] + #[must_use] + pub fn energyof_ch1(&self) -> bool { + let start = 8; + let end = 8; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 7` - Read the `cvrf` field. + /// + /// Conversion ready flag. Set when all conversions and averaging complete. Cleared by writing CONFIG1 or reading FLAGS. + #[must_use] + pub fn cvrf(&self) -> bool { + let start = 7; + let end = 7; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 6` - Read the `ovf` field. + /// + /// Math overflow flag. Indicates current and power data may be invalid. + #[must_use] + pub fn ovf(&self) -> bool { + let start = 6; + let end = 6; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 15` - Set the `limit4_alert` field. + /// + /// Alert limit 4 exceeded + #[doc(alias = "limit4-alert")] + pub fn set_limit4_alert(&mut self, value: bool) { + let start = 15; + let end = 15; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 14` - Set the `limit3_alert` field. + /// + /// Alert limit 3 exceeded + #[doc(alias = "limit3-alert")] + pub fn set_limit3_alert(&mut self, value: bool) { + let start = 14; + let end = 14; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 13` - Set the `limit2_alert` field. + /// + /// Alert limit 2 exceeded + #[doc(alias = "limit2-alert")] + pub fn set_limit2_alert(&mut self, value: bool) { + let start = 13; + let end = 13; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 12` - Set the `limit1_alert` field. + /// + /// Alert limit 1 exceeded + #[doc(alias = "limit1-alert")] + pub fn set_limit1_alert(&mut self, value: bool) { + let start = 12; + let end = 12; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 11` - Set the `energyof_ch4` field. + /// + /// Energy register overflow channel 4 + #[doc(alias = "energyof-ch4")] + pub fn set_energyof_ch4(&mut self, value: bool) { + let start = 11; + let end = 11; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 10` - Set the `energyof_ch3` field. + /// + /// Energy register overflow channel 3 + #[doc(alias = "energyof-ch3")] + pub fn set_energyof_ch3(&mut self, value: bool) { + let start = 10; + let end = 10; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 9` - Set the `energyof_ch2` field. + /// + /// Energy register overflow channel 2 + #[doc(alias = "energyof-ch2")] + pub fn set_energyof_ch2(&mut self, value: bool) { + let start = 9; + let end = 9; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 8` - Set the `energyof_ch1` field. + /// + /// Energy register overflow channel 1 + #[doc(alias = "energyof-ch1")] + pub fn set_energyof_ch1(&mut self, value: bool) { + let start = 8; + let end = 8; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 7` - Set the `cvrf` field. + /// + /// Conversion ready flag. Set when all conversions and averaging complete. Cleared by writing CONFIG1 or reading FLAGS. + pub fn set_cvrf(&mut self, value: bool) { + let start = 7; + let end = 7; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 6` - Set the `ovf` field. + /// + /// Math overflow flag. Indicates current and power data may be invalid. + pub fn set_ovf(&mut self, value: bool) { + let start = 6; + let end = 6; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitXorAssign for CalibrationCh1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +impl Default for Flags { + fn default() -> Self { + ::ZERO } - impl core::ops::Not for CalibrationCh1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl From<[u8; 2]> for Flags { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - /// Calibration register channel 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CalibrationCh2 { - /// The internal bits - bits: [u8; 2], +} +impl From for [u8; 2] { + fn from(val: Flags) -> Self { + val.bits } - impl ::device_driver::FieldSet for CalibrationCh2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl core::fmt::Debug for Flags { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("Flags"); + d.field("limit4_alert", &self.limit4_alert()); + d.field("limit3_alert", &self.limit3_alert()); + d.field("limit2_alert", &self.limit2_alert()); + d.field("limit1_alert", &self.limit1_alert()); + d.field("energyof_ch4", &self.energyof_ch4()); + d.field("energyof_ch3", &self.energyof_ch3()); + d.field("energyof_ch2", &self.energyof_ch2()); + d.field("energyof_ch1", &self.energyof_ch1()); + d.field("cvrf", &self.cvrf()); + d.field("ovf", &self.ovf()); + d.finish() } - impl CalibrationCh2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn shunt_cal(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 15) }; - raw - } - ///Write the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn set_shunt_cal(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 15, &mut self.bits) }; - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for Flags { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "Flags {{ "); + defmt::write!(f, "limit4_alert: {=bool}, ", &self.limit4_alert()); + defmt::write!(f, "limit3_alert: {=bool}, ", &self.limit3_alert()); + defmt::write!(f, "limit2_alert: {=bool}, ", &self.limit2_alert()); + defmt::write!(f, "limit1_alert: {=bool}, ", &self.limit1_alert()); + defmt::write!(f, "energyof_ch4: {=bool}, ", &self.energyof_ch4()); + defmt::write!(f, "energyof_ch3: {=bool}, ", &self.energyof_ch3()); + defmt::write!(f, "energyof_ch2: {=bool}, ", &self.energyof_ch2()); + defmt::write!(f, "energyof_ch1: {=bool}, ", &self.energyof_ch1()); + defmt::write!(f, "cvrf: {=bool}, ", &self.cvrf()); + defmt::write!(f, "ovf: {=bool}, ", &self.ovf()); + defmt::write!(f, "}}"); } - impl From<[u8; 2]> for CalibrationCh2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl core::ops::BitAnd for Flags { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl From for [u8; 2] { - fn from(val: CalibrationCh2) -> Self { - val.bits +} +impl core::ops::BitAndAssign for Flags { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::fmt::Debug for CalibrationCh2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CalibrationCh2"); - d.field("shunt_cal", &self.shunt_cal()); - d.finish() - } +} +impl core::ops::BitOr for Flags { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - #[cfg(feature = "defmt")] - impl defmt::Format for CalibrationCh2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CalibrationCh2 {{ "); - defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); - defmt::write!(f, "}}"); +} +impl core::ops::BitOrAssign for Flags { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitAnd for CalibrationCh2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitXor for Flags { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitAndAssign for CalibrationCh2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitXorAssign for Flags { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitOr for CalibrationCh2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::Not for Flags { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitOrAssign for CalibrationCh2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +#[doc(alias = "energy-ch-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct EnergyCh4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 4], +} +unsafe impl ::device_driver::Fieldset for EnergyCh4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 4] }; +} +impl EnergyCh4 { + /// `31:0` - Read the `energy` field. + /// + /// Accumulated energy in joules, unsigned + #[must_use] + pub fn energy(&self) -> u32 { + let start = 0; + let end = 31; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `31:0` - Set the `energy` field. + /// + /// Accumulated energy in joules, unsigned + pub fn set_energy(&mut self, value: u32) { + let start = 0; + let end = 31; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitXor for CalibrationCh2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl Default for EnergyCh4 { + fn default() -> Self { + ::ZERO } - impl core::ops::BitXorAssign for CalibrationCh2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +impl From<[u8; 4]> for EnergyCh4 { + fn from(bits: [u8; 4]) -> Self { + Self { bits } } - impl core::ops::Not for CalibrationCh2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl From for [u8; 4] { + fn from(val: EnergyCh4) -> Self { + val.bits } - /// Calibration register channel 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CalibrationCh3 { - /// The internal bits - bits: [u8; 2], +} +impl core::fmt::Debug for EnergyCh4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("EnergyCh4"); + d.field("energy", &self.energy()); + d.finish() } - impl ::device_driver::FieldSet for CalibrationCh3 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for EnergyCh4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "EnergyCh4 {{ "); + defmt::write!(f, "energy: {=u32}, ", &self.energy()); + defmt::write!(f, "}}"); } - impl CalibrationCh3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn shunt_cal(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 15) }; - raw - } - ///Write the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn set_shunt_cal(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 15, &mut self.bits) }; - } +} +impl core::ops::BitAnd for EnergyCh4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl From<[u8; 2]> for CalibrationCh3 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } +} +impl core::ops::BitAndAssign for EnergyCh4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl From for [u8; 2] { - fn from(val: CalibrationCh3) -> Self { - val.bits - } +} +impl core::ops::BitOr for EnergyCh4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::fmt::Debug for CalibrationCh3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CalibrationCh3"); - d.field("shunt_cal", &self.shunt_cal()); - d.finish() +} +impl core::ops::BitOrAssign for EnergyCh4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - #[cfg(feature = "defmt")] - impl defmt::Format for CalibrationCh3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CalibrationCh3 {{ "); - defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitXor for EnergyCh4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitAnd for CalibrationCh3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitXorAssign for EnergyCh4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitAndAssign for CalibrationCh3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::Not for EnergyCh4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitOr for CalibrationCh3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +#[doc(alias = "energy-ch-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct EnergyCh3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 4], +} +unsafe impl ::device_driver::Fieldset for EnergyCh3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 4] }; +} +impl EnergyCh3 { + /// `31:0` - Read the `energy` field. + /// + /// Accumulated energy in joules, unsigned + #[must_use] + pub fn energy(&self) -> u32 { + let start = 0; + let end = 31; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `31:0` - Set the `energy` field. + /// + /// Accumulated energy in joules, unsigned + pub fn set_energy(&mut self, value: u32) { + let start = 0; + let end = 31; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitOrAssign for CalibrationCh3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +impl Default for EnergyCh3 { + fn default() -> Self { + ::ZERO } - impl core::ops::BitXor for CalibrationCh3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl From<[u8; 4]> for EnergyCh3 { + fn from(bits: [u8; 4]) -> Self { + Self { bits } } - impl core::ops::BitXorAssign for CalibrationCh3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +impl From for [u8; 4] { + fn from(val: EnergyCh3) -> Self { + val.bits } - impl core::ops::Not for CalibrationCh3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl core::fmt::Debug for EnergyCh3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("EnergyCh3"); + d.field("energy", &self.energy()); + d.finish() } - /// Calibration register channel 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CalibrationCh4 { - /// The internal bits - bits: [u8; 2], +} +#[cfg(feature = "defmt")] +impl defmt::Format for EnergyCh3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "EnergyCh3 {{ "); + defmt::write!(f, "energy: {=u32}, ", &self.energy()); + defmt::write!(f, "}}"); } - impl ::device_driver::FieldSet for CalibrationCh4 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl core::ops::BitAnd for EnergyCh3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl CalibrationCh4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn shunt_cal(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 15) }; - raw - } - ///Write the `shunt_cal` field of the register. - /// - /// Shunt calibration value for current conversion - pub fn set_shunt_cal(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 15, &mut self.bits) }; +} +impl core::ops::BitAndAssign for EnergyCh3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl From<[u8; 2]> for CalibrationCh4 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl core::ops::BitOr for EnergyCh3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl From for [u8; 2] { - fn from(val: CalibrationCh4) -> Self { - val.bits +} +impl core::ops::BitOrAssign for EnergyCh3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::fmt::Debug for CalibrationCh4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CalibrationCh4"); - d.field("shunt_cal", &self.shunt_cal()); - d.finish() - } +} +impl core::ops::BitXor for EnergyCh3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - #[cfg(feature = "defmt")] - impl defmt::Format for CalibrationCh4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CalibrationCh4 {{ "); - defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); - defmt::write!(f, "}}"); +} +impl core::ops::BitXorAssign for EnergyCh3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitAnd for CalibrationCh4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::Not for EnergyCh3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitAndAssign for CalibrationCh4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +#[doc(alias = "energy-ch-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct EnergyCh2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 4], +} +unsafe impl ::device_driver::Fieldset for EnergyCh2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 4] }; +} +impl EnergyCh2 { + /// `31:0` - Read the `energy` field. + /// + /// Accumulated energy in joules, unsigned + #[must_use] + pub fn energy(&self) -> u32 { + let start = 0; + let end = 31; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `31:0` - Set the `energy` field. + /// + /// Accumulated energy in joules, unsigned + pub fn set_energy(&mut self, value: u32) { + let start = 0; + let end = 31; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitOr for CalibrationCh4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl Default for EnergyCh2 { + fn default() -> Self { + ::ZERO } - impl core::ops::BitOrAssign for CalibrationCh4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +impl From<[u8; 4]> for EnergyCh2 { + fn from(bits: [u8; 4]) -> Self { + Self { bits } } - impl core::ops::BitXor for CalibrationCh4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl From for [u8; 4] { + fn from(val: EnergyCh2) -> Self { + val.bits } - impl core::ops::BitXorAssign for CalibrationCh4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +impl core::fmt::Debug for EnergyCh2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("EnergyCh2"); + d.field("energy", &self.energy()); + d.finish() } - impl core::ops::Not for CalibrationCh4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for EnergyCh2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "EnergyCh2 {{ "); + defmt::write!(f, "energy: {=u32}, ", &self.energy()); + defmt::write!(f, "}}"); } - /// Alert configuration register 1 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertConfig1 { - /// The internal bits - bits: [u8; 2], +} +impl core::ops::BitAnd for EnergyCh2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl ::device_driver::FieldSet for AlertConfig1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits +} +impl core::ops::BitAndAssign for EnergyCh2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl AlertConfig1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn channel(&self) -> super::AlertChannel { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 3, 5) }; - unsafe { raw.try_into().unwrap_unchecked() } - } - ///Read the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn alert_mask(&self) -> super::AlertFunction { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 3) }; - unsafe { raw.try_into().unwrap_unchecked() } - } - ///Write the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn set_channel(&mut self, value: super::AlertChannel) { - let raw = value.into(); - unsafe { ::device_driver::ops::store_lsb0::(raw, 3, 5, &mut self.bits) }; - } - ///Write the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn set_alert_mask(&mut self, value: super::AlertFunction) { - let raw = value.into(); - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 3, &mut self.bits) }; - } +} +impl core::ops::BitOr for EnergyCh2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl From<[u8; 2]> for AlertConfig1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } +} +impl core::ops::BitOrAssign for EnergyCh2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl From for [u8; 2] { - fn from(val: AlertConfig1) -> Self { - val.bits - } +} +impl core::ops::BitXor for EnergyCh2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::fmt::Debug for AlertConfig1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertConfig1"); - d.field("channel", &self.channel()); - d.field("alert_mask", &self.alert_mask()); - d.finish() +} +impl core::ops::BitXorAssign for EnergyCh2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertConfig1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertConfig1 {{ "); - defmt::write!(f, "channel: {}, ", &self.channel()); - defmt::write!(f, "alert_mask: {}, ", &self.alert_mask()); - defmt::write!(f, "}}"); +} +impl core::ops::Not for EnergyCh2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitAnd for AlertConfig1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +#[doc(alias = "energy-ch-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct EnergyCh1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 4], +} +unsafe impl ::device_driver::Fieldset for EnergyCh1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 4] }; +} +impl EnergyCh1 { + /// `31:0` - Read the `energy` field. + /// + /// Accumulated energy in joules, unsigned + #[must_use] + pub fn energy(&self) -> u32 { + let start = 0; + let end = 31; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `31:0` - Set the `energy` field. + /// + /// Accumulated energy in joules, unsigned + pub fn set_energy(&mut self, value: u32) { + let start = 0; + let end = 31; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitAndAssign for AlertConfig1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl Default for EnergyCh1 { + fn default() -> Self { + ::ZERO } - impl core::ops::BitOr for AlertConfig1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl From<[u8; 4]> for EnergyCh1 { + fn from(bits: [u8; 4]) -> Self { + Self { bits } } - impl core::ops::BitOrAssign for AlertConfig1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +impl From for [u8; 4] { + fn from(val: EnergyCh1) -> Self { + val.bits } - impl core::ops::BitXor for AlertConfig1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::fmt::Debug for EnergyCh1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("EnergyCh1"); + d.field("energy", &self.energy()); + d.finish() } - impl core::ops::BitXorAssign for AlertConfig1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for EnergyCh1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "EnergyCh1 {{ "); + defmt::write!(f, "energy: {=u32}, ", &self.energy()); + defmt::write!(f, "}}"); + } +} +impl core::ops::BitAnd for EnergyCh1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::Not for AlertConfig1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::BitAndAssign for EnergyCh1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - /// Alert configuration register 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertConfig2 { - /// The internal bits - bits: [u8; 2], +} +impl core::ops::BitOr for EnergyCh1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl ::device_driver::FieldSet for AlertConfig2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits +} +impl core::ops::BitOrAssign for EnergyCh1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl AlertConfig2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn channel(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 3, 5) }; - raw - } - ///Read the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn alert_mask(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 3) }; - raw - } - ///Write the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn set_channel(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 3, 5, &mut self.bits) }; - } - ///Write the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn set_alert_mask(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 3, &mut self.bits) }; - } +} +impl core::ops::BitXor for EnergyCh1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl From<[u8; 2]> for AlertConfig2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } +} +impl core::ops::BitXorAssign for EnergyCh1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl From for [u8; 2] { - fn from(val: AlertConfig2) -> Self { - val.bits +} +impl core::ops::Not for EnergyCh1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::fmt::Debug for AlertConfig2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertConfig2"); - d.field("channel", &self.channel()); - d.field("alert_mask", &self.alert_mask()); - d.finish() - } +} +#[doc(alias = "power-ch-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct PowerCh4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for PowerCh4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl PowerCh4 { + /// `15:0` - Read the `power` field. + /// + /// Calculated power in watts, unsigned + #[must_use] + pub fn power(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `power` field. + /// + /// Calculated power in watts, unsigned + pub fn set_power(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertConfig2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertConfig2 {{ "); - defmt::write!(f, "channel: {=u8}, ", &self.channel()); - defmt::write!(f, "alert_mask: {=u8}, ", &self.alert_mask()); - defmt::write!(f, "}}"); - } +} +impl Default for PowerCh4 { + fn default() -> Self { + ::ZERO } - impl core::ops::BitAnd for AlertConfig2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl From<[u8; 2]> for PowerCh4 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl core::ops::BitAndAssign for AlertConfig2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl From for [u8; 2] { + fn from(val: PowerCh4) -> Self { + val.bits } - impl core::ops::BitOr for AlertConfig2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::fmt::Debug for PowerCh4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("PowerCh4"); + d.field("power", &self.power()); + d.finish() } - impl core::ops::BitOrAssign for AlertConfig2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for PowerCh4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "PowerCh4 {{ "); + defmt::write!(f, "power: {=u16}, ", &self.power()); + defmt::write!(f, "}}"); } - impl core::ops::BitXor for AlertConfig2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitAnd for PowerCh4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitXorAssign for AlertConfig2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitAndAssign for PowerCh4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::Not for AlertConfig2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::BitOr for PowerCh4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self + } +} +impl core::ops::BitOrAssign for PowerCh4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - /// Alert configuration register 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertConfig3 { - /// The internal bits - bits: [u8; 2], +} +impl core::ops::BitXor for PowerCh4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl ::device_driver::FieldSet for AlertConfig3 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits +} +impl core::ops::BitXorAssign for PowerCh4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl AlertConfig3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn channel(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 3, 5) }; - raw - } - ///Read the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn alert_mask(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 3) }; - raw - } - ///Write the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn set_channel(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 3, 5, &mut self.bits) }; - } - ///Write the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn set_alert_mask(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 3, &mut self.bits) }; +} +impl core::ops::Not for PowerCh4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl From<[u8; 2]> for AlertConfig3 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +#[doc(alias = "power-ch-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct PowerCh3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for PowerCh3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl PowerCh3 { + /// `15:0` - Read the `power` field. + /// + /// Calculated power in watts, unsigned + #[must_use] + pub fn power(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `power` field. + /// + /// Calculated power in watts, unsigned + pub fn set_power(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl From for [u8; 2] { - fn from(val: AlertConfig3) -> Self { - val.bits - } +} +impl Default for PowerCh3 { + fn default() -> Self { + ::ZERO } - impl core::fmt::Debug for AlertConfig3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertConfig3"); - d.field("channel", &self.channel()); - d.field("alert_mask", &self.alert_mask()); - d.finish() - } +} +impl From<[u8; 2]> for PowerCh3 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertConfig3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertConfig3 {{ "); - defmt::write!(f, "channel: {=u8}, ", &self.channel()); - defmt::write!(f, "alert_mask: {=u8}, ", &self.alert_mask()); - defmt::write!(f, "}}"); - } +} +impl From for [u8; 2] { + fn from(val: PowerCh3) -> Self { + val.bits } - impl core::ops::BitAnd for AlertConfig3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::fmt::Debug for PowerCh3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("PowerCh3"); + d.field("power", &self.power()); + d.finish() } - impl core::ops::BitAndAssign for AlertConfig3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for PowerCh3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "PowerCh3 {{ "); + defmt::write!(f, "power: {=u16}, ", &self.power()); + defmt::write!(f, "}}"); } - impl core::ops::BitOr for AlertConfig3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitAnd for PowerCh3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitOrAssign for AlertConfig3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitAndAssign for PowerCh3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitXor for AlertConfig3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self +} +impl core::ops::BitOr for PowerCh3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self + } +} +impl core::ops::BitOrAssign for PowerCh3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXorAssign for AlertConfig3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXor for PowerCh3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self + } +} +impl core::ops::BitXorAssign for PowerCh3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for AlertConfig3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for PowerCh3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Alert configuration register 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertConfig4 { - /// The internal bits - bits: [u8; 2], +} +#[doc(alias = "power-ch-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct PowerCh2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for PowerCh2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl PowerCh2 { + /// `15:0` - Read the `power` field. + /// + /// Calculated power in watts, unsigned + #[must_use] + pub fn power(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `power` field. + /// + /// Calculated power in watts, unsigned + pub fn set_power(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl ::device_driver::FieldSet for AlertConfig4 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl Default for PowerCh2 { + fn default() -> Self { + ::ZERO } - impl AlertConfig4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn channel(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 3, 5) }; - raw - } - ///Read the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn alert_mask(&self) -> u8 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 3) }; - raw - } - ///Write the `channel` field of the register. - /// - /// Channel assignment for this alert - pub fn set_channel(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 3, 5, &mut self.bits) }; - } - ///Write the `alert_mask` field of the register. - /// - /// Active alert function selection - pub fn set_alert_mask(&mut self, value: u8) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 3, &mut self.bits) }; - } +} +impl From<[u8; 2]> for PowerCh2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From<[u8; 2]> for AlertConfig4 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From for [u8; 2] { + fn from(val: PowerCh2) -> Self { + val.bits } - impl From for [u8; 2] { - fn from(val: AlertConfig4) -> Self { - val.bits - } +} +impl core::fmt::Debug for PowerCh2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("PowerCh2"); + d.field("power", &self.power()); + d.finish() } - impl core::fmt::Debug for AlertConfig4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertConfig4"); - d.field("channel", &self.channel()); - d.field("alert_mask", &self.alert_mask()); - d.finish() - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for PowerCh2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "PowerCh2 {{ "); + defmt::write!(f, "power: {=u16}, ", &self.power()); + defmt::write!(f, "}}"); } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertConfig4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertConfig4 {{ "); - defmt::write!(f, "channel: {=u8}, ", &self.channel()); - defmt::write!(f, "alert_mask: {=u8}, ", &self.alert_mask()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitAnd for PowerCh2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAnd for AlertConfig4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitAndAssign for PowerCh2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitAndAssign for AlertConfig4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl core::ops::BitOr for PowerCh2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOr for AlertConfig4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::BitOrAssign for PowerCh2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitOrAssign for AlertConfig4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +impl core::ops::BitXor for PowerCh2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXor for AlertConfig4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self +} +impl core::ops::BitXorAssign for PowerCh2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitXorAssign for AlertConfig4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::Not for PowerCh2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::Not for AlertConfig4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +#[doc(alias = "power-ch-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct PowerCh1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for PowerCh1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl PowerCh1 { + /// `15:0` - Read the `power` field. + /// + /// Calculated power in watts, unsigned + #[must_use] + pub fn power(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `power` field. + /// + /// Calculated power in watts, unsigned + pub fn set_power(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - /// Alert limit register 1. Format matches corresponding result register. - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertLimit1 { - /// The internal bits - bits: [u8; 2], +} +impl Default for PowerCh1 { + fn default() -> Self { + ::ZERO } - impl ::device_driver::FieldSet for AlertLimit1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl From<[u8; 2]> for PowerCh1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl AlertLimit1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `limit` field of the register. - /// - /// Alert threshold. Shunt=signed 16-bit, Bus=unsigned 15-bit, Power=unsigned 16-bit - pub fn limit(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `limit` field of the register. - /// - /// Alert threshold. Shunt=signed 16-bit, Bus=unsigned 15-bit, Power=unsigned 16-bit - pub fn set_limit(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl From for [u8; 2] { + fn from(val: PowerCh1) -> Self { + val.bits } - impl From<[u8; 2]> for AlertLimit1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl core::fmt::Debug for PowerCh1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("PowerCh1"); + d.field("power", &self.power()); + d.finish() } - impl From for [u8; 2] { - fn from(val: AlertLimit1) -> Self { - val.bits - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for PowerCh1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "PowerCh1 {{ "); + defmt::write!(f, "power: {=u16}, ", &self.power()); + defmt::write!(f, "}}"); } - impl core::fmt::Debug for AlertLimit1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertLimit1"); - d.field("limit", &self.limit()); - d.finish() - } +} +impl core::ops::BitAnd for PowerCh1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertLimit1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertLimit1 {{ "); - defmt::write!(f, "limit: {=u16}, ", &self.limit()); - defmt::write!(f, "}}"); +} +impl core::ops::BitAndAssign for PowerCh1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitAnd for AlertLimit1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitOr for PowerCh1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitAndAssign for AlertLimit1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitOrAssign for PowerCh1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitOr for AlertLimit1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitXor for PowerCh1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitOrAssign for AlertLimit1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitXorAssign for PowerCh1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitXor for AlertLimit1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self +} +impl core::ops::Not for PowerCh1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitXorAssign for AlertLimit1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +#[doc(alias = "current-ch-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CurrentCh4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CurrentCh4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CurrentCh4 { + /// `15:0` - Read the `current` field. + /// + /// Calculated current in amperes, 2's complement + #[must_use] + pub fn current(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `current` field. + /// + /// Calculated current in amperes, 2's complement + pub fn set_current(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::Not for AlertLimit1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl Default for CurrentCh4 { + fn default() -> Self { + ::ZERO } - /// Alert limit register 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertLimit2 { - /// The internal bits - bits: [u8; 2], +} +impl From<[u8; 2]> for CurrentCh4 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl ::device_driver::FieldSet for AlertLimit2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl From for [u8; 2] { + fn from(val: CurrentCh4) -> Self { + val.bits } - impl AlertLimit2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `limit` field of the register. - /// - /// Alert threshold - pub fn limit(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `limit` field of the register. - /// - /// Alert threshold - pub fn set_limit(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl core::fmt::Debug for CurrentCh4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CurrentCh4"); + d.field("current", &self.current()); + d.finish() } - impl From<[u8; 2]> for AlertLimit2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CurrentCh4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CurrentCh4 {{ "); + defmt::write!(f, "current: {=u16}, ", &self.current()); + defmt::write!(f, "}}"); } - impl From for [u8; 2] { - fn from(val: AlertLimit2) -> Self { - val.bits - } +} +impl core::ops::BitAnd for CurrentCh4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::fmt::Debug for AlertLimit2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertLimit2"); - d.field("limit", &self.limit()); - d.finish() +} +impl core::ops::BitAndAssign for CurrentCh4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertLimit2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertLimit2 {{ "); - defmt::write!(f, "limit: {=u16}, ", &self.limit()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitOr for CurrentCh4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitAnd for AlertLimit2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitOrAssign for CurrentCh4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitAndAssign for AlertLimit2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl core::ops::BitXor for CurrentCh4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitOr for AlertLimit2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::BitXorAssign for CurrentCh4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitOrAssign for AlertLimit2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::Not for CurrentCh4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitXor for AlertLimit2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +#[doc(alias = "current-ch-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CurrentCh3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CurrentCh3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CurrentCh3 { + /// `15:0` - Read the `current` field. + /// + /// Calculated current in amperes, 2's complement + #[must_use] + pub fn current(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `current` field. + /// + /// Calculated current in amperes, 2's complement + pub fn set_current(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitXorAssign for AlertLimit2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +impl Default for CurrentCh3 { + fn default() -> Self { + ::ZERO } - impl core::ops::Not for AlertLimit2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl From<[u8; 2]> for CurrentCh3 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - /// Alert limit register 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertLimit3 { - /// The internal bits - bits: [u8; 2], +} +impl From for [u8; 2] { + fn from(val: CurrentCh3) -> Self { + val.bits } - impl ::device_driver::FieldSet for AlertLimit3 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } - } - impl AlertLimit3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `limit` field of the register. - /// - /// Alert threshold - pub fn limit(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `limit` field of the register. - /// - /// Alert threshold - pub fn set_limit(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } - } - impl From<[u8; 2]> for AlertLimit3 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } - } - impl From for [u8; 2] { - fn from(val: AlertLimit3) -> Self { - val.bits - } - } - impl core::fmt::Debug for AlertLimit3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertLimit3"); - d.field("limit", &self.limit()); - d.finish() - } +} +impl core::fmt::Debug for CurrentCh3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CurrentCh3"); + d.field("current", &self.current()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertLimit3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertLimit3 {{ "); - defmt::write!(f, "limit: {=u16}, ", &self.limit()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CurrentCh3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CurrentCh3 {{ "); + defmt::write!(f, "current: {=u16}, ", &self.current()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for AlertLimit3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for CurrentCh3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for AlertLimit3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for CurrentCh3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for AlertLimit3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for CurrentCh3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for AlertLimit3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for CurrentCh3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for AlertLimit3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for CurrentCh3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for AlertLimit3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for CurrentCh3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for AlertLimit3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for CurrentCh3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Alert limit register 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct AlertLimit4 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for AlertLimit4 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "current-ch-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CurrentCh2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CurrentCh2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CurrentCh2 { + /// `15:0` - Read the `current` field. + /// + /// Calculated current in amperes, 2's complement + #[must_use] + pub fn current(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `current` field. + /// + /// Calculated current in amperes, 2's complement + pub fn set_current(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl AlertLimit4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `limit` field of the register. - /// - /// Alert threshold - pub fn limit(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `limit` field of the register. - /// - /// Alert threshold - pub fn set_limit(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for CurrentCh2 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for AlertLimit4 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for CurrentCh2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: AlertLimit4) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: CurrentCh2) -> Self { + val.bits } - impl core::fmt::Debug for AlertLimit4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("AlertLimit4"); - d.field("limit", &self.limit()); - d.finish() - } +} +impl core::fmt::Debug for CurrentCh2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CurrentCh2"); + d.field("current", &self.current()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for AlertLimit4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "AlertLimit4 {{ "); - defmt::write!(f, "limit: {=u16}, ", &self.limit()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CurrentCh2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CurrentCh2 {{ "); + defmt::write!(f, "current: {=u16}, ", &self.current()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for AlertLimit4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for CurrentCh2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for AlertLimit4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for CurrentCh2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for AlertLimit4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for CurrentCh2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for AlertLimit4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for CurrentCh2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for AlertLimit4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for CurrentCh2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for AlertLimit4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for CurrentCh2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for AlertLimit4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for CurrentCh2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Shunt voltage channel 1. 2's complement. LSB = 2.5uV (range=0) or 625nV (range=1) - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct ShuntVoltageCh1 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for ShuntVoltageCh1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "current-ch-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CurrentCh1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CurrentCh1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CurrentCh1 { + /// `15:0` - Read the `current` field. + /// + /// Calculated current in amperes, 2's complement + #[must_use] + pub fn current(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `current` field. + /// + /// Calculated current in amperes, 2's complement + pub fn set_current(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl ShuntVoltageCh1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn vshunt(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn set_vshunt(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for CurrentCh1 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for ShuntVoltageCh1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for CurrentCh1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: ShuntVoltageCh1) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: CurrentCh1) -> Self { + val.bits } - impl core::fmt::Debug for ShuntVoltageCh1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("ShuntVoltageCh1"); - d.field("vshunt", &self.vshunt()); - d.finish() - } +} +impl core::fmt::Debug for CurrentCh1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CurrentCh1"); + d.field("current", &self.current()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for ShuntVoltageCh1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "ShuntVoltageCh1 {{ "); - defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CurrentCh1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CurrentCh1 {{ "); + defmt::write!(f, "current: {=u16}, ", &self.current()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for ShuntVoltageCh1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for CurrentCh1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for ShuntVoltageCh1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for CurrentCh1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for ShuntVoltageCh1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for CurrentCh1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for ShuntVoltageCh1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for CurrentCh1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for ShuntVoltageCh1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for CurrentCh1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for ShuntVoltageCh1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for CurrentCh1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for ShuntVoltageCh1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for CurrentCh1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Shunt voltage channel 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct ShuntVoltageCh2 { - /// The internal bits - bits: [u8; 2], +} +#[doc(alias = "bus-voltage-ch-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct BusVoltageCh4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for BusVoltageCh4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl BusVoltageCh4 { + /// `15:0` - Read the `vbus` field. + /// + /// Bus voltage + #[must_use] + pub fn vbus(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vbus` field. + /// + /// Bus voltage + pub fn set_vbus(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl ::device_driver::FieldSet for ShuntVoltageCh2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl Default for BusVoltageCh4 { + fn default() -> Self { + ::ZERO } - impl ShuntVoltageCh2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn vshunt(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn set_vshunt(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl From<[u8; 2]> for BusVoltageCh4 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From<[u8; 2]> for ShuntVoltageCh2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From for [u8; 2] { + fn from(val: BusVoltageCh4) -> Self { + val.bits } - impl From for [u8; 2] { - fn from(val: ShuntVoltageCh2) -> Self { - val.bits - } +} +impl core::fmt::Debug for BusVoltageCh4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("BusVoltageCh4"); + d.field("vbus", &self.vbus()); + d.finish() } - impl core::fmt::Debug for ShuntVoltageCh2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("ShuntVoltageCh2"); - d.field("vshunt", &self.vshunt()); - d.finish() - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for BusVoltageCh4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "BusVoltageCh4 {{ "); + defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); + defmt::write!(f, "}}"); } - #[cfg(feature = "defmt")] - impl defmt::Format for ShuntVoltageCh2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "ShuntVoltageCh2 {{ "); - defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitAnd for BusVoltageCh4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAnd for ShuntVoltageCh2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitAndAssign for BusVoltageCh4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitAndAssign for ShuntVoltageCh2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl core::ops::BitOr for BusVoltageCh4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOr for ShuntVoltageCh2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::BitOrAssign for BusVoltageCh4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitOrAssign for ShuntVoltageCh2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +impl core::ops::BitXor for BusVoltageCh4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXor for ShuntVoltageCh2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self +} +impl core::ops::BitXorAssign for BusVoltageCh4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitXorAssign for ShuntVoltageCh2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::Not for BusVoltageCh4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::Not for ShuntVoltageCh2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +#[doc(alias = "bus-voltage-ch-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct BusVoltageCh3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for BusVoltageCh3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl BusVoltageCh3 { + /// `15:0` - Read the `vbus` field. + /// + /// Bus voltage + #[must_use] + pub fn vbus(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vbus` field. + /// + /// Bus voltage + pub fn set_vbus(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - /// Shunt voltage channel 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct ShuntVoltageCh3 { - /// The internal bits - bits: [u8; 2], +} +impl Default for BusVoltageCh3 { + fn default() -> Self { + ::ZERO } - impl ::device_driver::FieldSet for ShuntVoltageCh3 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl From<[u8; 2]> for BusVoltageCh3 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl ShuntVoltageCh3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn vshunt(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn set_vshunt(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl From for [u8; 2] { + fn from(val: BusVoltageCh3) -> Self { + val.bits } - impl From<[u8; 2]> for ShuntVoltageCh3 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl core::fmt::Debug for BusVoltageCh3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("BusVoltageCh3"); + d.field("vbus", &self.vbus()); + d.finish() } - impl From for [u8; 2] { - fn from(val: ShuntVoltageCh3) -> Self { - val.bits - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for BusVoltageCh3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "BusVoltageCh3 {{ "); + defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); + defmt::write!(f, "}}"); } - impl core::fmt::Debug for ShuntVoltageCh3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("ShuntVoltageCh3"); - d.field("vshunt", &self.vshunt()); - d.finish() - } +} +impl core::ops::BitAnd for BusVoltageCh3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - #[cfg(feature = "defmt")] - impl defmt::Format for ShuntVoltageCh3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "ShuntVoltageCh3 {{ "); - defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); - defmt::write!(f, "}}"); +} +impl core::ops::BitAndAssign for BusVoltageCh3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitAnd for ShuntVoltageCh3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitOr for BusVoltageCh3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitAndAssign for ShuntVoltageCh3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitOrAssign for BusVoltageCh3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitOr for ShuntVoltageCh3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitXor for BusVoltageCh3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitOrAssign for ShuntVoltageCh3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitXorAssign for BusVoltageCh3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitXor for ShuntVoltageCh3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self +} +impl core::ops::Not for BusVoltageCh3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitXorAssign for ShuntVoltageCh3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +#[doc(alias = "bus-voltage-ch-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct BusVoltageCh2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for BusVoltageCh2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl BusVoltageCh2 { + /// `15:0` - Read the `vbus` field. + /// + /// Bus voltage + #[must_use] + pub fn vbus(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vbus` field. + /// + /// Bus voltage + pub fn set_vbus(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::Not for ShuntVoltageCh3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl Default for BusVoltageCh2 { + fn default() -> Self { + ::ZERO } - /// Shunt voltage channel 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct ShuntVoltageCh4 { - /// The internal bits - bits: [u8; 2], +} +impl From<[u8; 2]> for BusVoltageCh2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl ::device_driver::FieldSet for ShuntVoltageCh4 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl From for [u8; 2] { + fn from(val: BusVoltageCh2) -> Self { + val.bits } - impl ShuntVoltageCh4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn vshunt(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vshunt` field of the register. - /// - /// Differential shunt voltage, 2's complement - pub fn set_vshunt(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl core::fmt::Debug for BusVoltageCh2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("BusVoltageCh2"); + d.field("vbus", &self.vbus()); + d.finish() } - impl From<[u8; 2]> for ShuntVoltageCh4 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for BusVoltageCh2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "BusVoltageCh2 {{ "); + defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); + defmt::write!(f, "}}"); } - impl From for [u8; 2] { - fn from(val: ShuntVoltageCh4) -> Self { - val.bits - } +} +impl core::ops::BitAnd for BusVoltageCh2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::fmt::Debug for ShuntVoltageCh4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("ShuntVoltageCh4"); - d.field("vshunt", &self.vshunt()); - d.finish() +} +impl core::ops::BitAndAssign for BusVoltageCh2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - #[cfg(feature = "defmt")] - impl defmt::Format for ShuntVoltageCh4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "ShuntVoltageCh4 {{ "); - defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitOr for BusVoltageCh2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitAnd for ShuntVoltageCh4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitOrAssign for BusVoltageCh2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitAndAssign for ShuntVoltageCh4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl core::ops::BitXor for BusVoltageCh2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitOr for ShuntVoltageCh4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::BitXorAssign for BusVoltageCh2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitOrAssign for ShuntVoltageCh4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::Not for BusVoltageCh2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitXor for ShuntVoltageCh4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +#[doc(alias = "bus-voltage-ch-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct BusVoltageCh1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for BusVoltageCh1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl BusVoltageCh1 { + /// `15:0` - Read the `vbus` field. + /// + /// Bus voltage, always positive, 2's complement format + #[must_use] + pub fn vbus(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vbus` field. + /// + /// Bus voltage, always positive, 2's complement format + pub fn set_vbus(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitXorAssign for ShuntVoltageCh4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +impl Default for BusVoltageCh1 { + fn default() -> Self { + ::ZERO } - impl core::ops::Not for ShuntVoltageCh4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl From<[u8; 2]> for BusVoltageCh1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - /// Bus voltage channel 1. Always positive. LSB = 1.6mV - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct BusVoltageCh1 { - /// The internal bits - bits: [u8; 2], +} +impl From for [u8; 2] { + fn from(val: BusVoltageCh1) -> Self { + val.bits } - impl ::device_driver::FieldSet for BusVoltageCh1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl core::fmt::Debug for BusVoltageCh1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("BusVoltageCh1"); + d.field("vbus", &self.vbus()); + d.finish() } - impl BusVoltageCh1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vbus` field of the register. - /// - /// Bus voltage, always positive, 2's complement format - pub fn vbus(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vbus` field of the register. - /// - /// Bus voltage, always positive, 2's complement format - pub fn set_vbus(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for BusVoltageCh1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "BusVoltageCh1 {{ "); + defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); + defmt::write!(f, "}}"); } - impl From<[u8; 2]> for BusVoltageCh1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl core::ops::BitAnd for BusVoltageCh1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl From for [u8; 2] { - fn from(val: BusVoltageCh1) -> Self { - val.bits +} +impl core::ops::BitAndAssign for BusVoltageCh1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::fmt::Debug for BusVoltageCh1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("BusVoltageCh1"); - d.field("vbus", &self.vbus()); - d.finish() - } +} +impl core::ops::BitOr for BusVoltageCh1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - #[cfg(feature = "defmt")] - impl defmt::Format for BusVoltageCh1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "BusVoltageCh1 {{ "); - defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); - defmt::write!(f, "}}"); +} +impl core::ops::BitOrAssign for BusVoltageCh1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitAnd for BusVoltageCh1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitXor for BusVoltageCh1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitAndAssign for BusVoltageCh1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitXorAssign for BusVoltageCh1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitOr for BusVoltageCh1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::Not for BusVoltageCh1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitOrAssign for BusVoltageCh1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +#[doc(alias = "shunt-voltage-ch-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct ShuntVoltageCh4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for ShuntVoltageCh4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl ShuntVoltageCh4 { + /// `15:0` - Read the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + #[must_use] + pub fn vshunt(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + pub fn set_vshunt(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::BitXor for BusVoltageCh1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl Default for ShuntVoltageCh4 { + fn default() -> Self { + ::ZERO } - impl core::ops::BitXorAssign for BusVoltageCh1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +impl From<[u8; 2]> for ShuntVoltageCh4 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl core::ops::Not for BusVoltageCh1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl From for [u8; 2] { + fn from(val: ShuntVoltageCh4) -> Self { + val.bits } - /// Bus voltage channel 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct BusVoltageCh2 { - /// The internal bits - bits: [u8; 2], +} +impl core::fmt::Debug for ShuntVoltageCh4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("ShuntVoltageCh4"); + d.field("vshunt", &self.vshunt()); + d.finish() } - impl ::device_driver::FieldSet for BusVoltageCh2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for ShuntVoltageCh4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "ShuntVoltageCh4 {{ "); + defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); + defmt::write!(f, "}}"); } - impl BusVoltageCh2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vbus` field of the register. - /// - /// Bus voltage - pub fn vbus(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vbus` field of the register. - /// - /// Bus voltage - pub fn set_vbus(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl core::ops::BitAnd for ShuntVoltageCh4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl From<[u8; 2]> for BusVoltageCh2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } +} +impl core::ops::BitAndAssign for ShuntVoltageCh4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl From for [u8; 2] { - fn from(val: BusVoltageCh2) -> Self { - val.bits - } +} +impl core::ops::BitOr for ShuntVoltageCh4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::fmt::Debug for BusVoltageCh2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("BusVoltageCh2"); - d.field("vbus", &self.vbus()); - d.finish() +} +impl core::ops::BitOrAssign for ShuntVoltageCh4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - #[cfg(feature = "defmt")] - impl defmt::Format for BusVoltageCh2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "BusVoltageCh2 {{ "); - defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitXor for ShuntVoltageCh4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitAnd for BusVoltageCh2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitXorAssign for ShuntVoltageCh4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitAndAssign for BusVoltageCh2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::Not for ShuntVoltageCh4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitOr for BusVoltageCh2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } - } - impl core::ops::BitOrAssign for BusVoltageCh2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } - } - impl core::ops::BitXor for BusVoltageCh2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } - } - impl core::ops::BitXorAssign for BusVoltageCh2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } - } - impl core::ops::Not for BusVoltageCh2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } - } - /// Bus voltage channel 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct BusVoltageCh3 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for BusVoltageCh3 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "shunt-voltage-ch-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct ShuntVoltageCh3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for ShuntVoltageCh3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl ShuntVoltageCh3 { + /// `15:0` - Read the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + #[must_use] + pub fn vshunt(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + pub fn set_vshunt(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl BusVoltageCh3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vbus` field of the register. - /// - /// Bus voltage - pub fn vbus(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vbus` field of the register. - /// - /// Bus voltage - pub fn set_vbus(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for ShuntVoltageCh3 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for BusVoltageCh3 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for ShuntVoltageCh3 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: BusVoltageCh3) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: ShuntVoltageCh3) -> Self { + val.bits } - impl core::fmt::Debug for BusVoltageCh3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("BusVoltageCh3"); - d.field("vbus", &self.vbus()); - d.finish() - } +} +impl core::fmt::Debug for ShuntVoltageCh3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("ShuntVoltageCh3"); + d.field("vshunt", &self.vshunt()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for BusVoltageCh3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "BusVoltageCh3 {{ "); - defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for ShuntVoltageCh3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "ShuntVoltageCh3 {{ "); + defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for BusVoltageCh3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for ShuntVoltageCh3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for BusVoltageCh3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for ShuntVoltageCh3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for BusVoltageCh3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for ShuntVoltageCh3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for BusVoltageCh3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for ShuntVoltageCh3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for BusVoltageCh3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for ShuntVoltageCh3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for BusVoltageCh3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for ShuntVoltageCh3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for BusVoltageCh3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for ShuntVoltageCh3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Bus voltage channel 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct BusVoltageCh4 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for BusVoltageCh4 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "shunt-voltage-ch-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct ShuntVoltageCh2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for ShuntVoltageCh2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl ShuntVoltageCh2 { + /// `15:0` - Read the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + #[must_use] + pub fn vshunt(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + pub fn set_vshunt(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl BusVoltageCh4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `vbus` field of the register. - /// - /// Bus voltage - pub fn vbus(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `vbus` field of the register. - /// - /// Bus voltage - pub fn set_vbus(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for ShuntVoltageCh2 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for BusVoltageCh4 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for ShuntVoltageCh2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: BusVoltageCh4) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: ShuntVoltageCh2) -> Self { + val.bits } - impl core::fmt::Debug for BusVoltageCh4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("BusVoltageCh4"); - d.field("vbus", &self.vbus()); - d.finish() - } +} +impl core::fmt::Debug for ShuntVoltageCh2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("ShuntVoltageCh2"); + d.field("vshunt", &self.vshunt()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for BusVoltageCh4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "BusVoltageCh4 {{ "); - defmt::write!(f, "vbus: {=u16}, ", &self.vbus()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for ShuntVoltageCh2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "ShuntVoltageCh2 {{ "); + defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for BusVoltageCh4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for ShuntVoltageCh2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for BusVoltageCh4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for ShuntVoltageCh2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for BusVoltageCh4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for ShuntVoltageCh2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for BusVoltageCh4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for ShuntVoltageCh2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for BusVoltageCh4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for ShuntVoltageCh2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for BusVoltageCh4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for ShuntVoltageCh2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for BusVoltageCh4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for ShuntVoltageCh2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Current channel 1. Value [A] = CURRENT_LSB x register_value - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CurrentCh1 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for CurrentCh1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "shunt-voltage-ch-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct ShuntVoltageCh1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for ShuntVoltageCh1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl ShuntVoltageCh1 { + /// `15:0` - Read the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + #[must_use] + pub fn vshunt(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `vshunt` field. + /// + /// Differential shunt voltage, 2's complement + pub fn set_vshunt(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl CurrentCh1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn current(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn set_current(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for ShuntVoltageCh1 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for CurrentCh1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for ShuntVoltageCh1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: CurrentCh1) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: ShuntVoltageCh1) -> Self { + val.bits } - impl core::fmt::Debug for CurrentCh1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CurrentCh1"); - d.field("current", &self.current()); - d.finish() - } +} +impl core::fmt::Debug for ShuntVoltageCh1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("ShuntVoltageCh1"); + d.field("vshunt", &self.vshunt()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for CurrentCh1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CurrentCh1 {{ "); - defmt::write!(f, "current: {=u16}, ", &self.current()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for ShuntVoltageCh1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "ShuntVoltageCh1 {{ "); + defmt::write!(f, "vshunt: {=u16}, ", &self.vshunt()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for CurrentCh1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for ShuntVoltageCh1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for CurrentCh1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for ShuntVoltageCh1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for CurrentCh1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for ShuntVoltageCh1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for CurrentCh1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for ShuntVoltageCh1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for CurrentCh1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for ShuntVoltageCh1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for CurrentCh1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for ShuntVoltageCh1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for CurrentCh1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for ShuntVoltageCh1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Current channel 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CurrentCh2 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for CurrentCh2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-limit-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertLimit4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertLimit4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertLimit4 { + /// `15:0` - Read the `limit` field. + /// + /// Alert threshold + #[must_use] + pub fn limit(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `limit` field. + /// + /// Alert threshold + pub fn set_limit(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl CurrentCh2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn current(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn set_current(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for AlertLimit4 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for CurrentCh2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertLimit4 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: CurrentCh2) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertLimit4) -> Self { + val.bits } - impl core::fmt::Debug for CurrentCh2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CurrentCh2"); - d.field("current", &self.current()); - d.finish() - } +} +impl core::fmt::Debug for AlertLimit4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertLimit4"); + d.field("limit", &self.limit()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for CurrentCh2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CurrentCh2 {{ "); - defmt::write!(f, "current: {=u16}, ", &self.current()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertLimit4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertLimit4 {{ "); + defmt::write!(f, "limit: {=u16}, ", &self.limit()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for CurrentCh2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertLimit4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for CurrentCh2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertLimit4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for CurrentCh2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertLimit4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for CurrentCh2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertLimit4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for CurrentCh2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertLimit4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for CurrentCh2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertLimit4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for CurrentCh2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertLimit4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Current channel 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CurrentCh3 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for CurrentCh3 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-limit-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertLimit3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertLimit3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertLimit3 { + /// `15:0` - Read the `limit` field. + /// + /// Alert threshold + #[must_use] + pub fn limit(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `limit` field. + /// + /// Alert threshold + pub fn set_limit(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl CurrentCh3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn current(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn set_current(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for AlertLimit3 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for CurrentCh3 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertLimit3 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: CurrentCh3) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertLimit3) -> Self { + val.bits } - impl core::fmt::Debug for CurrentCh3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CurrentCh3"); - d.field("current", &self.current()); - d.finish() - } +} +impl core::fmt::Debug for AlertLimit3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertLimit3"); + d.field("limit", &self.limit()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for CurrentCh3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CurrentCh3 {{ "); - defmt::write!(f, "current: {=u16}, ", &self.current()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertLimit3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertLimit3 {{ "); + defmt::write!(f, "limit: {=u16}, ", &self.limit()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for CurrentCh3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertLimit3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for CurrentCh3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertLimit3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for CurrentCh3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertLimit3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for CurrentCh3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertLimit3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for CurrentCh3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertLimit3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for CurrentCh3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertLimit3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for CurrentCh3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertLimit3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Current channel 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct CurrentCh4 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for CurrentCh4 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-limit-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertLimit2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertLimit2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertLimit2 { + /// `15:0` - Read the `limit` field. + /// + /// Alert threshold + #[must_use] + pub fn limit(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `limit` field. + /// + /// Alert threshold + pub fn set_limit(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl CurrentCh4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn current(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `current` field of the register. - /// - /// Calculated current in amperes, 2's complement - pub fn set_current(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for AlertLimit2 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for CurrentCh4 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertLimit2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: CurrentCh4) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertLimit2) -> Self { + val.bits } - impl core::fmt::Debug for CurrentCh4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("CurrentCh4"); - d.field("current", &self.current()); - d.finish() - } +} +impl core::fmt::Debug for AlertLimit2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertLimit2"); + d.field("limit", &self.limit()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for CurrentCh4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "CurrentCh4 {{ "); - defmt::write!(f, "current: {=u16}, ", &self.current()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertLimit2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertLimit2 {{ "); + defmt::write!(f, "limit: {=u16}, ", &self.limit()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for CurrentCh4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertLimit2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for CurrentCh4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertLimit2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for CurrentCh4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertLimit2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for CurrentCh4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertLimit2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for CurrentCh4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertLimit2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for CurrentCh4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertLimit2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for CurrentCh4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertLimit2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Power channel 1. Value [W] = 32 x CURRENT_LSB x register_value. Unsigned. - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct PowerCh1 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for PowerCh1 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-limit-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertLimit1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertLimit1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertLimit1 { + /// `15:0` - Read the `limit` field. + /// + /// Alert threshold. Shunt=signed 16-bit, Bus=unsigned 15-bit, Power=unsigned 16-bit + #[must_use] + pub fn limit(&self) -> u16 { + let start = 0; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `15:0` - Set the `limit` field. + /// + /// Alert threshold. Shunt=signed 16-bit, Bus=unsigned 15-bit, Power=unsigned 16-bit + pub fn set_limit(&mut self, value: u16) { + let start = 0; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl PowerCh1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn power(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn set_power(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for AlertLimit1 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for PowerCh1 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertLimit1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: PowerCh1) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertLimit1) -> Self { + val.bits } - impl core::fmt::Debug for PowerCh1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("PowerCh1"); - d.field("power", &self.power()); - d.finish() - } +} +impl core::fmt::Debug for AlertLimit1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertLimit1"); + d.field("limit", &self.limit()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for PowerCh1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "PowerCh1 {{ "); - defmt::write!(f, "power: {=u16}, ", &self.power()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertLimit1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertLimit1 {{ "); + defmt::write!(f, "limit: {=u16}, ", &self.limit()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for PowerCh1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertLimit1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for PowerCh1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertLimit1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for PowerCh1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertLimit1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for PowerCh1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertLimit1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for PowerCh1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertLimit1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for PowerCh1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertLimit1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for PowerCh1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertLimit1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Power channel 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct PowerCh2 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for PowerCh2 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-config-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertConfig4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertConfig4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertConfig4 { + /// `4:3` - Read the `channel` field. + /// + /// Channel assignment for this alert + #[must_use] + pub fn channel(&self) -> u8 { + let start = 3; + let end = 4; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `2:0` - Read the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + #[must_use] + pub fn alert_mask(&self) -> u8 { + let start = 0; + let end = 2; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `4:3` - Set the `channel` field. + /// + /// Channel assignment for this alert + pub fn set_channel(&mut self, value: u8) { + let start = 3; + let end = 4; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `2:0` - Set the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + pub fn set_alert_mask(&mut self, value: u8) { + let start = 0; + let end = 2; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl PowerCh2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn power(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn set_power(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for AlertConfig4 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for PowerCh2 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertConfig4 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: PowerCh2) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertConfig4) -> Self { + val.bits } - impl core::fmt::Debug for PowerCh2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("PowerCh2"); - d.field("power", &self.power()); - d.finish() - } +} +impl core::fmt::Debug for AlertConfig4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertConfig4"); + d.field("channel", &self.channel()); + d.field("alert_mask", &self.alert_mask()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for PowerCh2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "PowerCh2 {{ "); - defmt::write!(f, "power: {=u16}, ", &self.power()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertConfig4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertConfig4 {{ "); + defmt::write!(f, "channel: {=u8}, ", &self.channel()); + defmt::write!(f, "alert_mask: {=u8}, ", &self.alert_mask()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for PowerCh2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertConfig4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for PowerCh2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertConfig4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for PowerCh2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertConfig4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for PowerCh2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertConfig4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for PowerCh2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertConfig4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for PowerCh2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertConfig4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for PowerCh2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertConfig4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Power channel 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct PowerCh3 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for PowerCh3 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-config-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertConfig3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertConfig3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertConfig3 { + /// `4:3` - Read the `channel` field. + /// + /// Channel assignment for this alert + #[must_use] + pub fn channel(&self) -> u8 { + let start = 3; + let end = 4; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `2:0` - Read the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + #[must_use] + pub fn alert_mask(&self) -> u8 { + let start = 0; + let end = 2; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `4:3` - Set the `channel` field. + /// + /// Channel assignment for this alert + pub fn set_channel(&mut self, value: u8) { + let start = 3; + let end = 4; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `2:0` - Set the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + pub fn set_alert_mask(&mut self, value: u8) { + let start = 0; + let end = 2; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl PowerCh3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn power(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn set_power(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for AlertConfig3 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for PowerCh3 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertConfig3 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: PowerCh3) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertConfig3) -> Self { + val.bits } - impl core::fmt::Debug for PowerCh3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("PowerCh3"); - d.field("power", &self.power()); - d.finish() - } +} +impl core::fmt::Debug for AlertConfig3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertConfig3"); + d.field("channel", &self.channel()); + d.field("alert_mask", &self.alert_mask()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for PowerCh3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "PowerCh3 {{ "); - defmt::write!(f, "power: {=u16}, ", &self.power()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertConfig3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertConfig3 {{ "); + defmt::write!(f, "channel: {=u8}, ", &self.channel()); + defmt::write!(f, "alert_mask: {=u8}, ", &self.alert_mask()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for PowerCh3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertConfig3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for PowerCh3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertConfig3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for PowerCh3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertConfig3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for PowerCh3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertConfig3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for PowerCh3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertConfig3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for PowerCh3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertConfig3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for PowerCh3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertConfig3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Power channel 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct PowerCh4 { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for PowerCh4 { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-config-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertConfig2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertConfig2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertConfig2 { + /// `4:3` - Read the `channel` field. + /// + /// Channel assignment for this alert + #[must_use] + pub fn channel(&self) -> u8 { + let start = 3; + let end = 4; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `2:0` - Read the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + #[must_use] + pub fn alert_mask(&self) -> u8 { + let start = 0; + let end = 2; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `4:3` - Set the `channel` field. + /// + /// Channel assignment for this alert + pub fn set_channel(&mut self, value: u8) { + let start = 3; + let end = 4; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `2:0` - Set the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + pub fn set_alert_mask(&mut self, value: u8) { + let start = 0; + let end = 2; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl PowerCh4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn power(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `power` field of the register. - /// - /// Calculated power in watts, unsigned - pub fn set_power(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } +} +impl Default for AlertConfig2 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 2]> for PowerCh4 { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertConfig2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 2] { - fn from(val: PowerCh4) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertConfig2) -> Self { + val.bits } - impl core::fmt::Debug for PowerCh4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("PowerCh4"); - d.field("power", &self.power()); - d.finish() - } +} +impl core::fmt::Debug for AlertConfig2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertConfig2"); + d.field("channel", &self.channel()); + d.field("alert_mask", &self.alert_mask()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for PowerCh4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "PowerCh4 {{ "); - defmt::write!(f, "power: {=u16}, ", &self.power()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertConfig2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertConfig2 {{ "); + defmt::write!(f, "channel: {=u8}, ", &self.channel()); + defmt::write!(f, "alert_mask: {=u8}, ", &self.alert_mask()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for PowerCh4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertConfig2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for PowerCh4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertConfig2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for PowerCh4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertConfig2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for PowerCh4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertConfig2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for PowerCh4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertConfig2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for PowerCh4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertConfig2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for PowerCh4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertConfig2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Energy channel 1. Value [J] = 32 x CURRENT_LSB x register_value. Unsigned. - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EnergyCh1 { - /// The internal bits - bits: [u8; 4], - } - impl ::device_driver::FieldSet for EnergyCh1 { - const SIZE_BITS: u32 = 32; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "alert-config-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct AlertConfig1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for AlertConfig1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl AlertConfig1 { + /// `4:3` - Read the `channel` field. + /// + /// Channel assignment for this alert + #[must_use] + pub fn channel(&self) -> AlertChannel { + let start = 3; + let end = 4; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + unsafe { raw.try_into().unwrap_unchecked() } + } + /// `2:0` - Read the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + #[must_use] + pub fn alert_mask(&self) -> AlertFunction { + let start = 0; + let end = 2; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + unsafe { raw.try_into().unwrap_unchecked() } + } + /// `4:3` - Set the `channel` field. + /// + /// Channel assignment for this alert + pub fn set_channel(&mut self, value: AlertChannel) { + let start = 3; + let end = 4; + let raw = value.into(); + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `2:0` - Set the `alert_mask` field. + /// + /// Active alert function selection + #[doc(alias = "alert-mask")] + pub fn set_alert_mask(&mut self, value: AlertFunction) { + let start = 0; + let end = 2; + let raw = value.into(); + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl EnergyCh1 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0, 0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 4] } - } - ///Read the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn energy(&self) -> u32 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 32) }; - raw - } - ///Write the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn set_energy(&mut self, value: u32) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 32, &mut self.bits) }; - } +} +impl Default for AlertConfig1 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 4]> for EnergyCh1 { - fn from(bits: [u8; 4]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for AlertConfig1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 4] { - fn from(val: EnergyCh1) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: AlertConfig1) -> Self { + val.bits } - impl core::fmt::Debug for EnergyCh1 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("EnergyCh1"); - d.field("energy", &self.energy()); - d.finish() - } +} +impl core::fmt::Debug for AlertConfig1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("AlertConfig1"); + d.field("channel", &self.channel()); + d.field("alert_mask", &self.alert_mask()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for EnergyCh1 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "EnergyCh1 {{ "); - defmt::write!(f, "energy: {=u32}, ", &self.energy()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for AlertConfig1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "AlertConfig1 {{ "); + defmt::write!(f, "channel: {}, ", &self.channel()); + defmt::write!(f, "alert_mask: {}, ", &self.alert_mask()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for EnergyCh1 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for AlertConfig1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for EnergyCh1 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for AlertConfig1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for EnergyCh1 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for AlertConfig1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for EnergyCh1 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for AlertConfig1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for EnergyCh1 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for AlertConfig1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for EnergyCh1 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for AlertConfig1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for EnergyCh1 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for AlertConfig1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Energy channel 2 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EnergyCh2 { - /// The internal bits - bits: [u8; 4], - } - impl ::device_driver::FieldSet for EnergyCh2 { - const SIZE_BITS: u32 = 32; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +#[doc(alias = "calibration-ch-4")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CalibrationCh4 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CalibrationCh4 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CalibrationCh4 { + /// `14:0` - Read the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + #[must_use] + pub fn shunt_cal(&self) -> u16 { + let start = 0; + let end = 14; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `14:0` - Set the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + pub fn set_shunt_cal(&mut self, value: u16) { + let start = 0; + let end = 14; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl EnergyCh2 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0, 0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 4] } - } - ///Read the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn energy(&self) -> u32 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 32) }; - raw - } - ///Write the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn set_energy(&mut self, value: u32) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 32, &mut self.bits) }; - } +} +impl Default for CalibrationCh4 { + fn default() -> Self { + ::ZERO } - impl From<[u8; 4]> for EnergyCh2 { - fn from(bits: [u8; 4]) -> Self { - Self { bits } - } +} +impl From<[u8; 2]> for CalibrationCh4 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for [u8; 4] { - fn from(val: EnergyCh2) -> Self { - val.bits - } +} +impl From for [u8; 2] { + fn from(val: CalibrationCh4) -> Self { + val.bits } - impl core::fmt::Debug for EnergyCh2 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("EnergyCh2"); - d.field("energy", &self.energy()); - d.finish() - } +} +impl core::fmt::Debug for CalibrationCh4 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CalibrationCh4"); + d.field("shunt_cal", &self.shunt_cal()); + d.finish() } - #[cfg(feature = "defmt")] - impl defmt::Format for EnergyCh2 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "EnergyCh2 {{ "); - defmt::write!(f, "energy: {=u32}, ", &self.energy()); - defmt::write!(f, "}}"); - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CalibrationCh4 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CalibrationCh4 {{ "); + defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); + defmt::write!(f, "}}"); } - impl core::ops::BitAnd for EnergyCh2 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitAnd for CalibrationCh4 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAndAssign for EnergyCh2 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitAndAssign for CalibrationCh4 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitOr for EnergyCh2 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitOr for CalibrationCh4 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOrAssign for EnergyCh2 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitOrAssign for CalibrationCh4 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitXor for EnergyCh2 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } +} +impl core::ops::BitXor for CalibrationCh4 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXorAssign for EnergyCh2 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::BitXorAssign for CalibrationCh4 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::Not for EnergyCh2 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self +} +impl core::ops::Not for CalibrationCh4 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - /// Energy channel 3 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EnergyCh3 { - /// The internal bits - bits: [u8; 4], +} +#[doc(alias = "calibration-ch-3")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CalibrationCh3 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CalibrationCh3 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CalibrationCh3 { + /// `14:0` - Read the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + #[must_use] + pub fn shunt_cal(&self) -> u16 { + let start = 0; + let end = 14; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `14:0` - Set the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + pub fn set_shunt_cal(&mut self, value: u16) { + let start = 0; + let end = 14; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl ::device_driver::FieldSet for EnergyCh3 { - const SIZE_BITS: u32 = 32; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl Default for CalibrationCh3 { + fn default() -> Self { + ::ZERO } - impl EnergyCh3 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0, 0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 4] } - } - ///Read the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn energy(&self) -> u32 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 32) }; - raw - } - ///Write the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn set_energy(&mut self, value: u32) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 32, &mut self.bits) }; - } +} +impl From<[u8; 2]> for CalibrationCh3 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From<[u8; 4]> for EnergyCh3 { - fn from(bits: [u8; 4]) -> Self { - Self { bits } - } +} +impl From for [u8; 2] { + fn from(val: CalibrationCh3) -> Self { + val.bits } - impl From for [u8; 4] { - fn from(val: EnergyCh3) -> Self { - val.bits - } +} +impl core::fmt::Debug for CalibrationCh3 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CalibrationCh3"); + d.field("shunt_cal", &self.shunt_cal()); + d.finish() } - impl core::fmt::Debug for EnergyCh3 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("EnergyCh3"); - d.field("energy", &self.energy()); - d.finish() - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CalibrationCh3 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CalibrationCh3 {{ "); + defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); + defmt::write!(f, "}}"); } - #[cfg(feature = "defmt")] - impl defmt::Format for EnergyCh3 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "EnergyCh3 {{ "); - defmt::write!(f, "energy: {=u32}, ", &self.energy()); - defmt::write!(f, "}}"); - } +} +impl core::ops::BitAnd for CalibrationCh3 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl core::ops::BitAnd for EnergyCh3 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self +} +impl core::ops::BitAndAssign for CalibrationCh3 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitAndAssign for EnergyCh3 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } +} +impl core::ops::BitOr for CalibrationCh3 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitOr for EnergyCh3 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self +} +impl core::ops::BitOrAssign for CalibrationCh3 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitOrAssign for EnergyCh3 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } +} +impl core::ops::BitXor for CalibrationCh3 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitXor for EnergyCh3 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self +} +impl core::ops::BitXorAssign for CalibrationCh3 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitXorAssign for EnergyCh3 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } +} +impl core::ops::Not for CalibrationCh3 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::Not for EnergyCh3 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +#[doc(alias = "calibration-ch-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CalibrationCh2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CalibrationCh2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CalibrationCh2 { + /// `14:0` - Read the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + #[must_use] + pub fn shunt_cal(&self) -> u16 { + let start = 0; + let end = 14; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `14:0` - Set the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + pub fn set_shunt_cal(&mut self, value: u16) { + let start = 0; + let end = 14; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - /// Energy channel 4 - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct EnergyCh4 { - /// The internal bits - bits: [u8; 4], +} +impl Default for CalibrationCh2 { + fn default() -> Self { + ::ZERO } - impl ::device_driver::FieldSet for EnergyCh4 { - const SIZE_BITS: u32 = 32; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl From<[u8; 2]> for CalibrationCh2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl EnergyCh4 { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0, 0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 4] } - } - ///Read the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn energy(&self) -> u32 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 32) }; - raw - } - ///Write the `energy` field of the register. - /// - /// Accumulated energy in joules, unsigned - pub fn set_energy(&mut self, value: u32) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 32, &mut self.bits) }; - } +} +impl From for [u8; 2] { + fn from(val: CalibrationCh2) -> Self { + val.bits } - impl From<[u8; 4]> for EnergyCh4 { - fn from(bits: [u8; 4]) -> Self { - Self { bits } - } +} +impl core::fmt::Debug for CalibrationCh2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CalibrationCh2"); + d.field("shunt_cal", &self.shunt_cal()); + d.finish() } - impl From for [u8; 4] { - fn from(val: EnergyCh4) -> Self { - val.bits - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CalibrationCh2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CalibrationCh2 {{ "); + defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); + defmt::write!(f, "}}"); } - impl core::fmt::Debug for EnergyCh4 { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("EnergyCh4"); - d.field("energy", &self.energy()); - d.finish() - } +} +impl core::ops::BitAnd for CalibrationCh2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - #[cfg(feature = "defmt")] - impl defmt::Format for EnergyCh4 { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "EnergyCh4 {{ "); - defmt::write!(f, "energy: {=u32}, ", &self.energy()); - defmt::write!(f, "}}"); +} +impl core::ops::BitAndAssign for CalibrationCh2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl core::ops::BitAnd for EnergyCh4 { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } +} +impl core::ops::BitOr for CalibrationCh2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl core::ops::BitAndAssign for EnergyCh4 { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } +} +impl core::ops::BitOrAssign for CalibrationCh2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl core::ops::BitOr for EnergyCh4 { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } +} +impl core::ops::BitXor for CalibrationCh2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl core::ops::BitOrAssign for EnergyCh4 { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } +} +impl core::ops::BitXorAssign for CalibrationCh2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl core::ops::BitXor for EnergyCh4 { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self +} +impl core::ops::Not for CalibrationCh2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl core::ops::BitXorAssign for EnergyCh4 { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } +} +#[doc(alias = "calibration-ch-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct CalibrationCh1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for CalibrationCh1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl CalibrationCh1 { + /// `14:0` - Read the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + #[must_use] + pub fn shunt_cal(&self) -> u16 { + let start = 0; + let end = 14; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `14:0` - Set the `shunt_cal` field. + /// + /// Shunt calibration value for current conversion + #[doc(alias = "shunt-cal")] + pub fn set_shunt_cal(&mut self, value: u16) { + let start = 0; + let end = 14; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl core::ops::Not for EnergyCh4 { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl Default for CalibrationCh1 { + fn default() -> Self { + ::ZERO } - /// Flags register - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct Flags { - /// The internal bits - bits: [u8; 2], - } - impl ::device_driver::FieldSet for Flags { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } - } - impl Flags { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [0, 0] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `limit4_alert` field of the register. - /// - /// Alert limit 4 exceeded - pub fn limit4_alert(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 15, 16) }; - raw > 0 - } - ///Read the `limit3_alert` field of the register. - /// - /// Alert limit 3 exceeded - pub fn limit3_alert(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 14, 15) }; - raw > 0 - } - ///Read the `limit2_alert` field of the register. - /// - /// Alert limit 2 exceeded - pub fn limit2_alert(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 13, 14) }; - raw > 0 - } - ///Read the `limit1_alert` field of the register. - /// - /// Alert limit 1 exceeded - pub fn limit1_alert(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 12, 13) }; - raw > 0 - } - ///Read the `energyof_ch4` field of the register. - /// - /// Energy register overflow channel 4 - pub fn energyof_ch4(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 11, 12) }; - raw > 0 - } - ///Read the `energyof_ch3` field of the register. - /// - /// Energy register overflow channel 3 - pub fn energyof_ch3(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 10, 11) }; - raw > 0 - } - ///Read the `energyof_ch2` field of the register. - /// - /// Energy register overflow channel 2 - pub fn energyof_ch2(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 9, 10) }; - raw > 0 - } - ///Read the `energyof_ch1` field of the register. - /// - /// Energy register overflow channel 1 - pub fn energyof_ch1(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 8, 9) }; - raw > 0 - } - ///Read the `cvrf` field of the register. - /// - /// Conversion ready flag. Set when all conversions and averaging complete. Cleared by writing CONFIG1 or reading FLAGS. - pub fn cvrf(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 7, 8) }; - raw > 0 - } - ///Read the `ovf` field of the register. - /// - /// Math overflow flag. Indicates current and power data may be invalid. - pub fn ovf(&self) -> bool { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 6, 7) }; - raw > 0 - } - ///Write the `limit4_alert` field of the register. - /// - /// Alert limit 4 exceeded - pub fn set_limit4_alert(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 15, 16, &mut self.bits) }; - } - ///Write the `limit3_alert` field of the register. - /// - /// Alert limit 3 exceeded - pub fn set_limit3_alert(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 14, 15, &mut self.bits) }; - } - ///Write the `limit2_alert` field of the register. - /// - /// Alert limit 2 exceeded - pub fn set_limit2_alert(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 13, 14, &mut self.bits) }; - } - ///Write the `limit1_alert` field of the register. - /// - /// Alert limit 1 exceeded - pub fn set_limit1_alert(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 12, 13, &mut self.bits) }; - } - ///Write the `energyof_ch4` field of the register. - /// - /// Energy register overflow channel 4 - pub fn set_energyof_ch4(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 11, 12, &mut self.bits) }; - } - ///Write the `energyof_ch3` field of the register. - /// - /// Energy register overflow channel 3 - pub fn set_energyof_ch3(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 10, 11, &mut self.bits) }; - } - ///Write the `energyof_ch2` field of the register. - /// - /// Energy register overflow channel 2 - pub fn set_energyof_ch2(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 9, 10, &mut self.bits) }; - } - ///Write the `energyof_ch1` field of the register. - /// - /// Energy register overflow channel 1 - pub fn set_energyof_ch1(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 8, 9, &mut self.bits) }; - } - ///Write the `cvrf` field of the register. - /// - /// Conversion ready flag. Set when all conversions and averaging complete. Cleared by writing CONFIG1 or reading FLAGS. - pub fn set_cvrf(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 7, 8, &mut self.bits) }; - } - ///Write the `ovf` field of the register. - /// - /// Math overflow flag. Indicates current and power data may be invalid. - pub fn set_ovf(&mut self, value: bool) { - let raw = value as _; - unsafe { ::device_driver::ops::store_lsb0::(raw, 6, 7, &mut self.bits) }; - } - } - impl From<[u8; 2]> for Flags { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } - } - impl From for [u8; 2] { - fn from(val: Flags) -> Self { - val.bits - } - } - impl core::fmt::Debug for Flags { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("Flags"); - d.field("limit4_alert", &self.limit4_alert()); - d.field("limit3_alert", &self.limit3_alert()); - d.field("limit2_alert", &self.limit2_alert()); - d.field("limit1_alert", &self.limit1_alert()); - d.field("energyof_ch4", &self.energyof_ch4()); - d.field("energyof_ch3", &self.energyof_ch3()); - d.field("energyof_ch2", &self.energyof_ch2()); - d.field("energyof_ch1", &self.energyof_ch1()); - d.field("cvrf", &self.cvrf()); - d.field("ovf", &self.ovf()); - d.finish() - } - } - #[cfg(feature = "defmt")] - impl defmt::Format for Flags { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "Flags {{ "); - defmt::write!(f, "limit4_alert: {=bool}, ", &self.limit4_alert()); - defmt::write!(f, "limit3_alert: {=bool}, ", &self.limit3_alert()); - defmt::write!(f, "limit2_alert: {=bool}, ", &self.limit2_alert()); - defmt::write!(f, "limit1_alert: {=bool}, ", &self.limit1_alert()); - defmt::write!(f, "energyof_ch4: {=bool}, ", &self.energyof_ch4()); - defmt::write!(f, "energyof_ch3: {=bool}, ", &self.energyof_ch3()); - defmt::write!(f, "energyof_ch2: {=bool}, ", &self.energyof_ch2()); - defmt::write!(f, "energyof_ch1: {=bool}, ", &self.energyof_ch1()); - defmt::write!(f, "cvrf: {=bool}, ", &self.cvrf()); - defmt::write!(f, "ovf: {=bool}, ", &self.ovf()); - defmt::write!(f, "}}"); - } - } - impl core::ops::BitAnd for Flags { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } - } - impl core::ops::BitAndAssign for Flags { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } - } - impl core::ops::BitOr for Flags { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } - } - impl core::ops::BitOrAssign for Flags { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } - } - impl core::ops::BitXor for Flags { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } - } - impl core::ops::BitXorAssign for Flags { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } - } - impl core::ops::Not for Flags { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } +} +impl From<[u8; 2]> for CalibrationCh1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - /// Manufacturer ID. Reads back 0x5449 ('TI' in ASCII) - #[derive(Copy, Clone, Eq, PartialEq)] - pub struct ManufacturerId { - /// The internal bits - bits: [u8; 2], +} +impl From for [u8; 2] { + fn from(val: CalibrationCh1) -> Self { + val.bits } - impl ::device_driver::FieldSet for ManufacturerId { - const SIZE_BITS: u32 = 16; - fn new_with_zero() -> Self { - Self::new_zero() - } - fn get_inner_buffer(&self) -> &[u8] { - &self.bits - } - fn get_inner_buffer_mut(&mut self) -> &mut [u8] { - &mut self.bits - } +} +impl core::fmt::Debug for CalibrationCh1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("CalibrationCh1"); + d.field("shunt_cal", &self.shunt_cal()); + d.finish() } - impl ManufacturerId { - /// Create a new instance, loaded with the reset value (if any) - pub const fn new() -> Self { - Self { bits: [84, 73] } - } - /// Create a new instance, loaded with all zeroes - pub const fn new_zero() -> Self { - Self { bits: [0; 2] } - } - ///Read the `id` field of the register. - /// - /// Manufacturer ID - pub fn id(&self) -> u16 { - let raw = unsafe { ::device_driver::ops::load_lsb0::(&self.bits, 0, 16) }; - raw - } - ///Write the `id` field of the register. - /// - /// Manufacturer ID - pub fn set_id(&mut self, value: u16) { - let raw = value; - unsafe { ::device_driver::ops::store_lsb0::(raw, 0, 16, &mut self.bits) }; - } - } - impl From<[u8; 2]> for ManufacturerId { - fn from(bits: [u8; 2]) -> Self { - Self { bits } - } - } - impl From for [u8; 2] { - fn from(val: ManufacturerId) -> Self { - val.bits - } - } - impl core::fmt::Debug for ManufacturerId { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { - let mut d = f.debug_struct("ManufacturerId"); - d.field("id", &self.id()); - d.finish() - } - } - #[cfg(feature = "defmt")] - impl defmt::Format for ManufacturerId { - fn format(&self, f: defmt::Formatter) { - defmt::write!(f, "ManufacturerId {{ "); - defmt::write!(f, "id: {=u16}, ", &self.id()); - defmt::write!(f, "}}"); - } - } - impl core::ops::BitAnd for ManufacturerId { - type Output = Self; - fn bitand(mut self, rhs: Self) -> Self::Output { - self &= rhs; - self - } - } - impl core::ops::BitAndAssign for ManufacturerId { - fn bitand_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l &= *r; - } - } - } - impl core::ops::BitOr for ManufacturerId { - type Output = Self; - fn bitor(mut self, rhs: Self) -> Self::Output { - self |= rhs; - self - } - } - impl core::ops::BitOrAssign for ManufacturerId { - fn bitor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l |= *r; - } - } - } - impl core::ops::BitXor for ManufacturerId { - type Output = Self; - fn bitxor(mut self, rhs: Self) -> Self::Output { - self ^= rhs; - self - } - } - impl core::ops::BitXorAssign for ManufacturerId { - fn bitxor_assign(&mut self, rhs: Self) { - for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { - *l ^= *r; - } - } - } - impl core::ops::Not for ManufacturerId { - type Output = Self; - fn not(mut self) -> Self::Output { - for val in self.bits.iter_mut() { - *val = !*val; - } - self - } - } - /// Enum containing all possible field set types - pub enum FieldSetValue { - /// Configuration register 1 - Config1(Config1), - /// Configuration register 2 - Config2(Config2), - /// Calibration register channel 1 - CalibrationCh1(CalibrationCh1), - /// Calibration register channel 2 - CalibrationCh2(CalibrationCh2), - /// Calibration register channel 3 - CalibrationCh3(CalibrationCh3), - /// Calibration register channel 4 - CalibrationCh4(CalibrationCh4), - /// Alert configuration register 1 - AlertConfig1(AlertConfig1), - /// Alert configuration register 2 - AlertConfig2(AlertConfig2), - /// Alert configuration register 3 - AlertConfig3(AlertConfig3), - /// Alert configuration register 4 - AlertConfig4(AlertConfig4), - /// Alert limit register 1. Format matches corresponding result register. - AlertLimit1(AlertLimit1), - /// Alert limit register 2 - AlertLimit2(AlertLimit2), - /// Alert limit register 3 - AlertLimit3(AlertLimit3), - /// Alert limit register 4 - AlertLimit4(AlertLimit4), - /// Shunt voltage channel 1. 2's complement. LSB = 2.5uV (range=0) or 625nV (range=1) - ShuntVoltageCh1(ShuntVoltageCh1), - /// Shunt voltage channel 2 - ShuntVoltageCh2(ShuntVoltageCh2), - /// Shunt voltage channel 3 - ShuntVoltageCh3(ShuntVoltageCh3), - /// Shunt voltage channel 4 - ShuntVoltageCh4(ShuntVoltageCh4), - /// Bus voltage channel 1. Always positive. LSB = 1.6mV - BusVoltageCh1(BusVoltageCh1), - /// Bus voltage channel 2 - BusVoltageCh2(BusVoltageCh2), - /// Bus voltage channel 3 - BusVoltageCh3(BusVoltageCh3), - /// Bus voltage channel 4 - BusVoltageCh4(BusVoltageCh4), - /// Current channel 1. Value [A] = CURRENT_LSB x register_value - CurrentCh1(CurrentCh1), - /// Current channel 2 - CurrentCh2(CurrentCh2), - /// Current channel 3 - CurrentCh3(CurrentCh3), - /// Current channel 4 - CurrentCh4(CurrentCh4), - /// Power channel 1. Value [W] = 32 x CURRENT_LSB x register_value. Unsigned. - PowerCh1(PowerCh1), - /// Power channel 2 - PowerCh2(PowerCh2), - /// Power channel 3 - PowerCh3(PowerCh3), - /// Power channel 4 - PowerCh4(PowerCh4), - /// Energy channel 1. Value [J] = 32 x CURRENT_LSB x register_value. Unsigned. - EnergyCh1(EnergyCh1), - /// Energy channel 2 - EnergyCh2(EnergyCh2), - /// Energy channel 3 - EnergyCh3(EnergyCh3), - /// Energy channel 4 - EnergyCh4(EnergyCh4), - /// Flags register - Flags(Flags), - /// Manufacturer ID. Reads back 0x5449 ('TI' in ASCII) - ManufacturerId(ManufacturerId), - } - impl core::fmt::Debug for FieldSetValue { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - match self { - Self::Config1(val) => core::fmt::Debug::fmt(val, f), - Self::Config2(val) => core::fmt::Debug::fmt(val, f), - Self::CalibrationCh1(val) => core::fmt::Debug::fmt(val, f), - Self::CalibrationCh2(val) => core::fmt::Debug::fmt(val, f), - Self::CalibrationCh3(val) => core::fmt::Debug::fmt(val, f), - Self::CalibrationCh4(val) => core::fmt::Debug::fmt(val, f), - Self::AlertConfig1(val) => core::fmt::Debug::fmt(val, f), - Self::AlertConfig2(val) => core::fmt::Debug::fmt(val, f), - Self::AlertConfig3(val) => core::fmt::Debug::fmt(val, f), - Self::AlertConfig4(val) => core::fmt::Debug::fmt(val, f), - Self::AlertLimit1(val) => core::fmt::Debug::fmt(val, f), - Self::AlertLimit2(val) => core::fmt::Debug::fmt(val, f), - Self::AlertLimit3(val) => core::fmt::Debug::fmt(val, f), - Self::AlertLimit4(val) => core::fmt::Debug::fmt(val, f), - Self::ShuntVoltageCh1(val) => core::fmt::Debug::fmt(val, f), - Self::ShuntVoltageCh2(val) => core::fmt::Debug::fmt(val, f), - Self::ShuntVoltageCh3(val) => core::fmt::Debug::fmt(val, f), - Self::ShuntVoltageCh4(val) => core::fmt::Debug::fmt(val, f), - Self::BusVoltageCh1(val) => core::fmt::Debug::fmt(val, f), - Self::BusVoltageCh2(val) => core::fmt::Debug::fmt(val, f), - Self::BusVoltageCh3(val) => core::fmt::Debug::fmt(val, f), - Self::BusVoltageCh4(val) => core::fmt::Debug::fmt(val, f), - Self::CurrentCh1(val) => core::fmt::Debug::fmt(val, f), - Self::CurrentCh2(val) => core::fmt::Debug::fmt(val, f), - Self::CurrentCh3(val) => core::fmt::Debug::fmt(val, f), - Self::CurrentCh4(val) => core::fmt::Debug::fmt(val, f), - Self::PowerCh1(val) => core::fmt::Debug::fmt(val, f), - Self::PowerCh2(val) => core::fmt::Debug::fmt(val, f), - Self::PowerCh3(val) => core::fmt::Debug::fmt(val, f), - Self::PowerCh4(val) => core::fmt::Debug::fmt(val, f), - Self::EnergyCh1(val) => core::fmt::Debug::fmt(val, f), - Self::EnergyCh2(val) => core::fmt::Debug::fmt(val, f), - Self::EnergyCh3(val) => core::fmt::Debug::fmt(val, f), - Self::EnergyCh4(val) => core::fmt::Debug::fmt(val, f), - Self::Flags(val) => core::fmt::Debug::fmt(val, f), - Self::ManufacturerId(val) => core::fmt::Debug::fmt(val, f), - #[allow(unreachable_patterns)] - _ => unreachable!(), - } - } - } - #[cfg(feature = "defmt")] - impl defmt::Format for FieldSetValue { - fn format(&self, f: defmt::Formatter) { - match self { - Self::Config1(val) => defmt::Format::format(val, f), - Self::Config2(val) => defmt::Format::format(val, f), - Self::CalibrationCh1(val) => defmt::Format::format(val, f), - Self::CalibrationCh2(val) => defmt::Format::format(val, f), - Self::CalibrationCh3(val) => defmt::Format::format(val, f), - Self::CalibrationCh4(val) => defmt::Format::format(val, f), - Self::AlertConfig1(val) => defmt::Format::format(val, f), - Self::AlertConfig2(val) => defmt::Format::format(val, f), - Self::AlertConfig3(val) => defmt::Format::format(val, f), - Self::AlertConfig4(val) => defmt::Format::format(val, f), - Self::AlertLimit1(val) => defmt::Format::format(val, f), - Self::AlertLimit2(val) => defmt::Format::format(val, f), - Self::AlertLimit3(val) => defmt::Format::format(val, f), - Self::AlertLimit4(val) => defmt::Format::format(val, f), - Self::ShuntVoltageCh1(val) => defmt::Format::format(val, f), - Self::ShuntVoltageCh2(val) => defmt::Format::format(val, f), - Self::ShuntVoltageCh3(val) => defmt::Format::format(val, f), - Self::ShuntVoltageCh4(val) => defmt::Format::format(val, f), - Self::BusVoltageCh1(val) => defmt::Format::format(val, f), - Self::BusVoltageCh2(val) => defmt::Format::format(val, f), - Self::BusVoltageCh3(val) => defmt::Format::format(val, f), - Self::BusVoltageCh4(val) => defmt::Format::format(val, f), - Self::CurrentCh1(val) => defmt::Format::format(val, f), - Self::CurrentCh2(val) => defmt::Format::format(val, f), - Self::CurrentCh3(val) => defmt::Format::format(val, f), - Self::CurrentCh4(val) => defmt::Format::format(val, f), - Self::PowerCh1(val) => defmt::Format::format(val, f), - Self::PowerCh2(val) => defmt::Format::format(val, f), - Self::PowerCh3(val) => defmt::Format::format(val, f), - Self::PowerCh4(val) => defmt::Format::format(val, f), - Self::EnergyCh1(val) => defmt::Format::format(val, f), - Self::EnergyCh2(val) => defmt::Format::format(val, f), - Self::EnergyCh3(val) => defmt::Format::format(val, f), - Self::EnergyCh4(val) => defmt::Format::format(val, f), - Self::Flags(val) => defmt::Format::format(val, f), - Self::ManufacturerId(val) => defmt::Format::format(val, f), - } - } - } - impl From for FieldSetValue { - fn from(val: Config1) -> Self { - Self::Config1(val) - } - } - impl From for FieldSetValue { - fn from(val: Config2) -> Self { - Self::Config2(val) - } - } - impl From for FieldSetValue { - fn from(val: CalibrationCh1) -> Self { - Self::CalibrationCh1(val) - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for CalibrationCh1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "CalibrationCh1 {{ "); + defmt::write!(f, "shunt_cal: {=u16}, ", &self.shunt_cal()); + defmt::write!(f, "}}"); } - impl From for FieldSetValue { - fn from(val: CalibrationCh2) -> Self { - Self::CalibrationCh2(val) - } +} +impl core::ops::BitAnd for CalibrationCh1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl From for FieldSetValue { - fn from(val: CalibrationCh3) -> Self { - Self::CalibrationCh3(val) +} +impl core::ops::BitAndAssign for CalibrationCh1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl From for FieldSetValue { - fn from(val: CalibrationCh4) -> Self { - Self::CalibrationCh4(val) - } +} +impl core::ops::BitOr for CalibrationCh1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl From for FieldSetValue { - fn from(val: AlertConfig1) -> Self { - Self::AlertConfig1(val) +} +impl core::ops::BitOrAssign for CalibrationCh1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl From for FieldSetValue { - fn from(val: AlertConfig2) -> Self { - Self::AlertConfig2(val) - } +} +impl core::ops::BitXor for CalibrationCh1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl From for FieldSetValue { - fn from(val: AlertConfig3) -> Self { - Self::AlertConfig3(val) +} +impl core::ops::BitXorAssign for CalibrationCh1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl From for FieldSetValue { - fn from(val: AlertConfig4) -> Self { - Self::AlertConfig4(val) +} +impl core::ops::Not for CalibrationCh1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl From for FieldSetValue { - fn from(val: AlertLimit1) -> Self { - Self::AlertLimit1(val) - } +} +#[doc(alias = "config-2")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct Config2 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for Config2 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl Config2 { + /// `bit 15` - Read the `rst` field. + /// + /// System reset. Set to 1 to reset all registers to default. Self-clears. + #[must_use] + pub fn rst(&self) -> bool { + let start = 15; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `11:8` - Read the `acc_rst` field. + /// + /// Energy accumulator reset per channel. Bit11=CH4, Bit10=CH3, Bit9=CH2, Bit8=CH1. Bits self-clear after write. + #[doc(alias = "acc-rst")] + #[must_use] + pub fn acc_rst(&self) -> u8 { + let start = 8; + let end = 11; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `bit 7` - Read the `cnvr_mask` field. + /// + /// Conversion ready flag on ALERT pin enable + #[doc(alias = "cnvr-mask")] + #[must_use] + pub fn cnvr_mask(&self) -> bool { + let start = 7; + let end = 7; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 6` - Read the `enof_mask` field. + /// + /// Energy overflow alert enable + #[doc(alias = "enof-mask")] + #[must_use] + pub fn enof_mask(&self) -> bool { + let start = 6; + let end = 6; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 5` - Read the `alert_latch` field. + /// + /// Alert pin latch enable. When set, alert latches until flags register is read. + #[doc(alias = "alert-latch")] + #[must_use] + pub fn alert_latch(&self) -> bool { + let start = 5; + let end = 5; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw > 0 + } + /// `bit 4` - Read the `alert_pol` field. + /// + /// Alert pin polarity + #[doc(alias = "alert-pol")] + #[must_use] + pub fn alert_pol(&self) -> AlertPolarity { + let start = 4; + let end = 4; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + unsafe { raw.try_into().unwrap_unchecked() } + } + /// `3:0` - Read the `range` field. + /// + /// Shunt full scale input range per channel. Bit3=CH4, Bit2=CH3, Bit1=CH2, Bit0=CH1. 0=±81.92mV, 1=±20.48mV + #[must_use] + pub fn range(&self) -> u8 { + let start = 0; + let end = 3; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `bit 15` - Set the `rst` field. + /// + /// System reset. Set to 1 to reset all registers to default. Self-clears. + pub fn set_rst(&mut self, value: bool) { + let start = 15; + let end = 15; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `11:8` - Set the `acc_rst` field. + /// + /// Energy accumulator reset per channel. Bit11=CH4, Bit10=CH3, Bit9=CH2, Bit8=CH1. Bits self-clear after write. + #[doc(alias = "acc-rst")] + pub fn set_acc_rst(&mut self, value: u8) { + let start = 8; + let end = 11; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 7` - Set the `cnvr_mask` field. + /// + /// Conversion ready flag on ALERT pin enable + #[doc(alias = "cnvr-mask")] + pub fn set_cnvr_mask(&mut self, value: bool) { + let start = 7; + let end = 7; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 6` - Set the `enof_mask` field. + /// + /// Energy overflow alert enable + #[doc(alias = "enof-mask")] + pub fn set_enof_mask(&mut self, value: bool) { + let start = 6; + let end = 6; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 5` - Set the `alert_latch` field. + /// + /// Alert pin latch enable. When set, alert latches until flags register is read. + #[doc(alias = "alert-latch")] + pub fn set_alert_latch(&mut self, value: bool) { + let start = 5; + let end = 5; + let raw = value as _; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `bit 4` - Set the `alert_pol` field. + /// + /// Alert pin polarity + #[doc(alias = "alert-pol")] + pub fn set_alert_pol(&mut self, value: AlertPolarity) { + let start = 4; + let end = 4; + let raw = value.into(); + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `3:0` - Set the `range` field. + /// + /// Shunt full scale input range per channel. Bit3=CH4, Bit2=CH3, Bit1=CH2, Bit0=CH1. 0=±81.92mV, 1=±20.48mV + pub fn set_range(&mut self, value: u8) { + let start = 0; + let end = 3; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl From for FieldSetValue { - fn from(val: AlertLimit2) -> Self { - Self::AlertLimit2(val) - } +} +impl Default for Config2 { + fn default() -> Self { + ::ZERO } - impl From for FieldSetValue { - fn from(val: AlertLimit3) -> Self { - Self::AlertLimit3(val) - } +} +impl From<[u8; 2]> for Config2 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for FieldSetValue { - fn from(val: AlertLimit4) -> Self { - Self::AlertLimit4(val) - } +} +impl From for [u8; 2] { + fn from(val: Config2) -> Self { + val.bits } - impl From for FieldSetValue { - fn from(val: ShuntVoltageCh1) -> Self { - Self::ShuntVoltageCh1(val) - } +} +impl core::fmt::Debug for Config2 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("Config2"); + d.field("rst", &self.rst()); + d.field("acc_rst", &self.acc_rst()); + d.field("cnvr_mask", &self.cnvr_mask()); + d.field("enof_mask", &self.enof_mask()); + d.field("alert_latch", &self.alert_latch()); + d.field("alert_pol", &self.alert_pol()); + d.field("range", &self.range()); + d.finish() } - impl From for FieldSetValue { - fn from(val: ShuntVoltageCh2) -> Self { - Self::ShuntVoltageCh2(val) - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for Config2 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "Config2 {{ "); + defmt::write!(f, "rst: {=bool}, ", &self.rst()); + defmt::write!(f, "acc_rst: {=u8}, ", &self.acc_rst()); + defmt::write!(f, "cnvr_mask: {=bool}, ", &self.cnvr_mask()); + defmt::write!(f, "enof_mask: {=bool}, ", &self.enof_mask()); + defmt::write!(f, "alert_latch: {=bool}, ", &self.alert_latch()); + defmt::write!(f, "alert_pol: {}, ", &self.alert_pol()); + defmt::write!(f, "range: {=u8}, ", &self.range()); + defmt::write!(f, "}}"); } - impl From for FieldSetValue { - fn from(val: ShuntVoltageCh3) -> Self { - Self::ShuntVoltageCh3(val) - } +} +impl core::ops::BitAnd for Config2 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl From for FieldSetValue { - fn from(val: ShuntVoltageCh4) -> Self { - Self::ShuntVoltageCh4(val) +} +impl core::ops::BitAndAssign for Config2 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl From for FieldSetValue { - fn from(val: BusVoltageCh1) -> Self { - Self::BusVoltageCh1(val) - } +} +impl core::ops::BitOr for Config2 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl From for FieldSetValue { - fn from(val: BusVoltageCh2) -> Self { - Self::BusVoltageCh2(val) +} +impl core::ops::BitOrAssign for Config2 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl From for FieldSetValue { - fn from(val: BusVoltageCh3) -> Self { - Self::BusVoltageCh3(val) - } +} +impl core::ops::BitXor for Config2 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl From for FieldSetValue { - fn from(val: BusVoltageCh4) -> Self { - Self::BusVoltageCh4(val) +} +impl core::ops::BitXorAssign for Config2 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl From for FieldSetValue { - fn from(val: CurrentCh1) -> Self { - Self::CurrentCh1(val) +} +impl core::ops::Not for Config2 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } - impl From for FieldSetValue { - fn from(val: CurrentCh2) -> Self { - Self::CurrentCh2(val) - } +} +#[doc(alias = "config-1")] +#[derive(Copy, Clone, Eq, PartialEq)] +#[repr(transparent)] +pub struct Config1 { + #[doc(hidden)] + /// The internal bits + bits: [u8; 2], +} +unsafe impl ::device_driver::Fieldset for Config1 { + const METADATA: ::device_driver::FieldsetMetadata = + ::device_driver::FieldsetMetadata::new().with_byte_order(::device_driver::ByteOrder::BE); + const ZERO: Self = Self { bits: [0; 2] }; +} +impl Config1 { + /// `15:12` - Read the `active_channel` field. + /// + /// Active channel enable bits. Bit15=CH4, Bit14=CH3, Bit13=CH2, Bit12=CH1 + #[doc(alias = "active-channel")] + #[must_use] + pub fn active_channel(&self) -> u8 { + let start = 12; + let end = 15; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + raw + } + /// `11:9` - Read the `avg` field. + /// + /// Number of ADC conversion results to average + #[must_use] + pub fn avg(&self) -> Averaging { + let start = 9; + let end = 11; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + unsafe { raw.try_into().unwrap_unchecked() } + } + /// `8:6` - Read the `vbusct` field. + /// + /// Bus voltage conversion time + #[must_use] + pub fn vbusct(&self) -> BusConversionTime { + let start = 6; + let end = 8; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + unsafe { raw.try_into().unwrap_unchecked() } + } + /// `5:3` - Read the `vshct` field. + /// + /// Shunt voltage conversion time + #[must_use] + pub fn vshct(&self) -> ShuntConversionTime { + let start = 3; + let end = 5; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + unsafe { raw.try_into().unwrap_unchecked() } + } + /// `2:0` - Read the `mode` field. + /// + /// Operating mode + #[must_use] + pub fn mode(&self) -> Mode { + let start = 0; + let end = 2; + let raw = unsafe { ::device_driver::ops::load::(&self.bits, start, end) }; + unsafe { raw.try_into().unwrap_unchecked() } + } + /// `15:12` - Set the `active_channel` field. + /// + /// Active channel enable bits. Bit15=CH4, Bit14=CH3, Bit13=CH2, Bit12=CH1 + #[doc(alias = "active-channel")] + pub fn set_active_channel(&mut self, value: u8) { + let start = 12; + let end = 15; + let raw = value; + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `11:9` - Set the `avg` field. + /// + /// Number of ADC conversion results to average + pub fn set_avg(&mut self, value: Averaging) { + let start = 9; + let end = 11; + let raw = value.into(); + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `8:6` - Set the `vbusct` field. + /// + /// Bus voltage conversion time + pub fn set_vbusct(&mut self, value: BusConversionTime) { + let start = 6; + let end = 8; + let raw = value.into(); + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `5:3` - Set the `vshct` field. + /// + /// Shunt voltage conversion time + pub fn set_vshct(&mut self, value: ShuntConversionTime) { + let start = 3; + let end = 5; + let raw = value.into(); + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; + } + /// `2:0` - Set the `mode` field. + /// + /// Operating mode + pub fn set_mode(&mut self, value: Mode) { + let start = 0; + let end = 2; + let raw = value.into(); + unsafe { ::device_driver::ops::store::(raw, start, end, &mut self.bits) }; } - impl From for FieldSetValue { - fn from(val: CurrentCh3) -> Self { - Self::CurrentCh3(val) - } +} +impl Default for Config1 { + fn default() -> Self { + ::ZERO } - impl From for FieldSetValue { - fn from(val: CurrentCh4) -> Self { - Self::CurrentCh4(val) - } +} +impl From<[u8; 2]> for Config1 { + fn from(bits: [u8; 2]) -> Self { + Self { bits } } - impl From for FieldSetValue { - fn from(val: PowerCh1) -> Self { - Self::PowerCh1(val) - } +} +impl From for [u8; 2] { + fn from(val: Config1) -> Self { + val.bits } - impl From for FieldSetValue { - fn from(val: PowerCh2) -> Self { - Self::PowerCh2(val) - } +} +impl core::fmt::Debug for Config1 { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> { + let mut d = f.debug_struct("Config1"); + d.field("active_channel", &self.active_channel()); + d.field("avg", &self.avg()); + d.field("vbusct", &self.vbusct()); + d.field("vshct", &self.vshct()); + d.field("mode", &self.mode()); + d.finish() } - impl From for FieldSetValue { - fn from(val: PowerCh3) -> Self { - Self::PowerCh3(val) - } +} +#[cfg(feature = "defmt")] +impl defmt::Format for Config1 { + fn format(&self, f: defmt::Formatter) { + defmt::write!(f, "Config1 {{ "); + defmt::write!(f, "active_channel: {=u8}, ", &self.active_channel()); + defmt::write!(f, "avg: {}, ", &self.avg()); + defmt::write!(f, "vbusct: {}, ", &self.vbusct()); + defmt::write!(f, "vshct: {}, ", &self.vshct()); + defmt::write!(f, "mode: {}, ", &self.mode()); + defmt::write!(f, "}}"); } - impl From for FieldSetValue { - fn from(val: PowerCh4) -> Self { - Self::PowerCh4(val) - } +} +impl core::ops::BitAnd for Config1 { + type Output = Self; + fn bitand(mut self, rhs: Self) -> Self::Output { + self &= rhs; + self } - impl From for FieldSetValue { - fn from(val: EnergyCh1) -> Self { - Self::EnergyCh1(val) +} +impl core::ops::BitAndAssign for Config1 { + fn bitand_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l &= *r; } } - impl From for FieldSetValue { - fn from(val: EnergyCh2) -> Self { - Self::EnergyCh2(val) - } +} +impl core::ops::BitOr for Config1 { + type Output = Self; + fn bitor(mut self, rhs: Self) -> Self::Output { + self |= rhs; + self } - impl From for FieldSetValue { - fn from(val: EnergyCh3) -> Self { - Self::EnergyCh3(val) +} +impl core::ops::BitOrAssign for Config1 { + fn bitor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l |= *r; } } - impl From for FieldSetValue { - fn from(val: EnergyCh4) -> Self { - Self::EnergyCh4(val) - } +} +impl core::ops::BitXor for Config1 { + type Output = Self; + fn bitxor(mut self, rhs: Self) -> Self::Output { + self ^= rhs; + self } - impl From for FieldSetValue { - fn from(val: Flags) -> Self { - Self::Flags(val) +} +impl core::ops::BitXorAssign for Config1 { + fn bitxor_assign(&mut self, rhs: Self) { + for (l, r) in self.bits.iter_mut().zip(&rhs.bits) { + *l ^= *r; } } - impl From for FieldSetValue { - fn from(val: ManufacturerId) -> Self { - Self::ManufacturerId(val) +} +impl core::ops::Not for Config1 { + type Output = Self; + fn not(mut self) -> Self::Output { + for val in self.bits.iter_mut() { + *val = !*val; } + self } } -/// Averaging count +#[doc(alias = "alert-function")] #[repr(u8)] #[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum Averaging { - _1 = 0, - _4 = 1, - _16 = 2, - _64 = 3, - _128 = 4, - _256 = 5, - _512 = 6, - _1024 = 7, +pub enum AlertFunction { + #[doc(alias = "none")] + None = 0, + #[doc(alias = "shunt-over-limit")] + ShuntOverLimit = 1, + #[doc(alias = "shunt-under-limit")] + ShuntUnderLimit = 2, + #[doc(alias = "bus-over-limit")] + BusOverLimit = 3, + #[doc(alias = "bus-under-limit")] + BusUnderLimit = 4, + #[doc(alias = "power-over-limit")] + PowerOverLimit = 5, + #[doc(alias = "reserved-6")] + Reserved6 = 6, + #[doc(alias = "reserved-7")] + Reserved7 = 7, } -impl core::convert::TryFrom for Averaging { +impl core::convert::TryFrom for AlertFunction { type Error = ::device_driver::ConversionError; fn try_from(val: u8) -> Result { match val { - 0 => Ok(Self::_1), - 1 => Ok(Self::_4), - 2 => Ok(Self::_16), - 3 => Ok(Self::_64), - 4 => Ok(Self::_128), - 5 => Ok(Self::_256), - 6 => Ok(Self::_512), - 7 => Ok(Self::_1024), + 0 => Ok(Self::None), + 1 => Ok(Self::ShuntOverLimit), + 2 => Ok(Self::ShuntUnderLimit), + 3 => Ok(Self::BusOverLimit), + 4 => Ok(Self::BusUnderLimit), + 5 => Ok(Self::PowerOverLimit), + 6 => Ok(Self::Reserved6), + 7 => Ok(Self::Reserved7), val => Err(::device_driver::ConversionError { source: val, - target: "Averaging", + target: "AlertFunction", }), } } } -impl From for u8 { - fn from(val: Averaging) -> Self { +impl From for u8 { + fn from(val: AlertFunction) -> Self { match val { - Averaging::_1 => 0, - Averaging::_4 => 1, - Averaging::_16 => 2, - Averaging::_64 => 3, - Averaging::_128 => 4, - Averaging::_256 => 5, - Averaging::_512 => 6, - Averaging::_1024 => 7, + AlertFunction::None => 0, + AlertFunction::ShuntOverLimit => 1, + AlertFunction::ShuntUnderLimit => 2, + AlertFunction::BusOverLimit => 3, + AlertFunction::BusUnderLimit => 4, + AlertFunction::PowerOverLimit => 5, + AlertFunction::Reserved6 => 6, + AlertFunction::Reserved7 => 7, } } } -/// Bus voltage conversion time +#[doc(hidden)] +impl ::device_driver::EnumIndex for AlertFunction { + #[track_caller] + fn index(&self) -> i32 { + let index = u8::from(*self); + index.try_into().unwrap() + } +} +#[doc(alias = "alert-channel")] #[repr(u8)] #[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum BusConversionTime { - _140Us = 0, - _204Us = 1, - _332Us = 2, - _588Us = 3, - _1100Us = 4, - _2116Us = 5, - _4156Us = 6, - _8244Us = 7, +pub enum AlertChannel { + #[doc(alias = "ch1")] + Ch1 = 0, + #[doc(alias = "ch2")] + Ch2 = 1, + #[doc(alias = "ch3")] + Ch3 = 2, + #[doc(alias = "ch4")] + Ch4 = 3, } -impl core::convert::TryFrom for BusConversionTime { +impl core::convert::TryFrom for AlertChannel { type Error = ::device_driver::ConversionError; fn try_from(val: u8) -> Result { match val { - 0 => Ok(Self::_140Us), - 1 => Ok(Self::_204Us), - 2 => Ok(Self::_332Us), - 3 => Ok(Self::_588Us), - 4 => Ok(Self::_1100Us), - 5 => Ok(Self::_2116Us), - 6 => Ok(Self::_4156Us), - 7 => Ok(Self::_8244Us), + 0 => Ok(Self::Ch1), + 1 => Ok(Self::Ch2), + 2 => Ok(Self::Ch3), + 3 => Ok(Self::Ch4), val => Err(::device_driver::ConversionError { source: val, - target: "BusConversionTime", + target: "AlertChannel", }), } } } -impl From for u8 { - fn from(val: BusConversionTime) -> Self { +impl From for u8 { + fn from(val: AlertChannel) -> Self { match val { - BusConversionTime::_140Us => 0, - BusConversionTime::_204Us => 1, - BusConversionTime::_332Us => 2, - BusConversionTime::_588Us => 3, - BusConversionTime::_1100Us => 4, - BusConversionTime::_2116Us => 5, - BusConversionTime::_4156Us => 6, - BusConversionTime::_8244Us => 7, + AlertChannel::Ch1 => 0, + AlertChannel::Ch2 => 1, + AlertChannel::Ch3 => 2, + AlertChannel::Ch4 => 3, } } } -/// Shunt voltage conversion time +#[doc(hidden)] +impl ::device_driver::EnumIndex for AlertChannel { + #[track_caller] + fn index(&self) -> i32 { + let index = u8::from(*self); + index.try_into().unwrap() + } +} +#[doc(alias = "alert-polarity")] #[repr(u8)] #[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum ShuntConversionTime { - _140Us = 0, - _204Us = 1, - _332Us = 2, - _588Us = 3, - _1100Us = 4, - _2116Us = 5, - _4156Us = 6, - _8244Us = 7, +pub enum AlertPolarity { + #[doc(alias = "active-low")] + ActiveLow = 0, + #[doc(alias = "active-high")] + ActiveHigh = 1, } -impl core::convert::TryFrom for ShuntConversionTime { +impl core::convert::TryFrom for AlertPolarity { type Error = ::device_driver::ConversionError; fn try_from(val: u8) -> Result { match val { - 0 => Ok(Self::_140Us), - 1 => Ok(Self::_204Us), - 2 => Ok(Self::_332Us), - 3 => Ok(Self::_588Us), - 4 => Ok(Self::_1100Us), - 5 => Ok(Self::_2116Us), - 6 => Ok(Self::_4156Us), - 7 => Ok(Self::_8244Us), + 0 => Ok(Self::ActiveLow), + 1 => Ok(Self::ActiveHigh), val => Err(::device_driver::ConversionError { source: val, - target: "ShuntConversionTime", + target: "AlertPolarity", }), } } } -impl From for u8 { - fn from(val: ShuntConversionTime) -> Self { +impl From for u8 { + fn from(val: AlertPolarity) -> Self { match val { - ShuntConversionTime::_140Us => 0, - ShuntConversionTime::_204Us => 1, - ShuntConversionTime::_332Us => 2, - ShuntConversionTime::_588Us => 3, - ShuntConversionTime::_1100Us => 4, - ShuntConversionTime::_2116Us => 5, - ShuntConversionTime::_4156Us => 6, - ShuntConversionTime::_8244Us => 7, + AlertPolarity::ActiveLow => 0, + AlertPolarity::ActiveHigh => 1, } } } +#[doc(hidden)] +impl ::device_driver::EnumIndex for AlertPolarity { + #[track_caller] + fn index(&self) -> i32 { + let index = u8::from(*self); + index.try_into().unwrap() + } +} /// Operating mode +#[doc(alias = "mode")] #[repr(u8)] #[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Mode { + #[doc(alias = "shutdown")] Shutdown = 0, + #[doc(alias = "shunt-triggered")] ShuntTriggered = 1, + #[doc(alias = "bus-triggered")] BusTriggered = 2, + #[doc(alias = "shunt-and-bus-triggered")] ShuntAndBusTriggered = 3, + #[doc(alias = "shutdown-2")] Shutdown2 = 4, + #[doc(alias = "continuous-shunt")] ContinuousShunt = 5, + #[doc(alias = "continuous-bus")] ContinuousBus = 6, + #[doc(alias = "continuous-shunt-and-bus")] ContinuousShuntAndBus = 7, } impl core::convert::TryFrom for Mode { @@ -5755,111 +5431,203 @@ impl From for u8 { } } } +#[doc(hidden)] +impl ::device_driver::EnumIndex for Mode { + #[track_caller] + fn index(&self) -> i32 { + let index = u8::from(*self); + index.try_into().unwrap() + } +} +/// Shunt voltage conversion time +#[doc(alias = "shunt-conversion-time")] #[repr(u8)] #[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum AlertPolarity { - ActiveLow = 0, - ActiveHigh = 1, +pub enum ShuntConversionTime { + #[doc(alias = "us-140")] + Us140 = 0, + #[doc(alias = "us-204")] + Us204 = 1, + #[doc(alias = "us-332")] + Us332 = 2, + #[doc(alias = "us-588")] + Us588 = 3, + #[doc(alias = "us-1100")] + Us1100 = 4, + #[doc(alias = "us-2116")] + Us2116 = 5, + #[doc(alias = "us-4156")] + Us4156 = 6, + #[doc(alias = "us-8244")] + Us8244 = 7, } -impl core::convert::TryFrom for AlertPolarity { +impl core::convert::TryFrom for ShuntConversionTime { type Error = ::device_driver::ConversionError; fn try_from(val: u8) -> Result { match val { - 0 => Ok(Self::ActiveLow), - 1 => Ok(Self::ActiveHigh), + 0 => Ok(Self::Us140), + 1 => Ok(Self::Us204), + 2 => Ok(Self::Us332), + 3 => Ok(Self::Us588), + 4 => Ok(Self::Us1100), + 5 => Ok(Self::Us2116), + 6 => Ok(Self::Us4156), + 7 => Ok(Self::Us8244), val => Err(::device_driver::ConversionError { source: val, - target: "AlertPolarity", + target: "ShuntConversionTime", }), } } } -impl From for u8 { - fn from(val: AlertPolarity) -> Self { +impl From for u8 { + fn from(val: ShuntConversionTime) -> Self { match val { - AlertPolarity::ActiveLow => 0, - AlertPolarity::ActiveHigh => 1, + ShuntConversionTime::Us140 => 0, + ShuntConversionTime::Us204 => 1, + ShuntConversionTime::Us332 => 2, + ShuntConversionTime::Us588 => 3, + ShuntConversionTime::Us1100 => 4, + ShuntConversionTime::Us2116 => 5, + ShuntConversionTime::Us4156 => 6, + ShuntConversionTime::Us8244 => 7, } } } +#[doc(hidden)] +impl ::device_driver::EnumIndex for ShuntConversionTime { + #[track_caller] + fn index(&self) -> i32 { + let index = u8::from(*self); + index.try_into().unwrap() + } +} +/// Bus voltage conversion time +#[doc(alias = "bus-conversion-time")] #[repr(u8)] #[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum AlertChannel { - Ch1 = 0, - Ch2 = 1, - Ch3 = 2, - Ch4 = 3, +pub enum BusConversionTime { + #[doc(alias = "us-140")] + Us140 = 0, + #[doc(alias = "us-204")] + Us204 = 1, + #[doc(alias = "us-332")] + Us332 = 2, + #[doc(alias = "us-588")] + Us588 = 3, + #[doc(alias = "us-1100")] + Us1100 = 4, + #[doc(alias = "us-2116")] + Us2116 = 5, + #[doc(alias = "us-4156")] + Us4156 = 6, + #[doc(alias = "us-8244")] + Us8244 = 7, } -impl core::convert::TryFrom for AlertChannel { +impl core::convert::TryFrom for BusConversionTime { type Error = ::device_driver::ConversionError; fn try_from(val: u8) -> Result { match val { - 0 => Ok(Self::Ch1), - 1 => Ok(Self::Ch2), - 2 => Ok(Self::Ch3), - 3 => Ok(Self::Ch4), + 0 => Ok(Self::Us140), + 1 => Ok(Self::Us204), + 2 => Ok(Self::Us332), + 3 => Ok(Self::Us588), + 4 => Ok(Self::Us1100), + 5 => Ok(Self::Us2116), + 6 => Ok(Self::Us4156), + 7 => Ok(Self::Us8244), val => Err(::device_driver::ConversionError { source: val, - target: "AlertChannel", + target: "BusConversionTime", }), } } } -impl From for u8 { - fn from(val: AlertChannel) -> Self { +impl From for u8 { + fn from(val: BusConversionTime) -> Self { match val { - AlertChannel::Ch1 => 0, - AlertChannel::Ch2 => 1, - AlertChannel::Ch3 => 2, - AlertChannel::Ch4 => 3, + BusConversionTime::Us140 => 0, + BusConversionTime::Us204 => 1, + BusConversionTime::Us332 => 2, + BusConversionTime::Us588 => 3, + BusConversionTime::Us1100 => 4, + BusConversionTime::Us2116 => 5, + BusConversionTime::Us4156 => 6, + BusConversionTime::Us8244 => 7, } } } +#[doc(hidden)] +impl ::device_driver::EnumIndex for BusConversionTime { + #[track_caller] + fn index(&self) -> i32 { + let index = u8::from(*self); + index.try_into().unwrap() + } +} +/// Averaging count +#[doc(alias = "averaging")] #[repr(u8)] #[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum AlertFunction { - None = 0, - ShuntOverLimit = 1, - ShuntUnderLimit = 2, - BusOverLimit = 3, - BusUnderLimit = 4, - PowerOverLimit = 5, - Reserved6 = 6, - Reserved7 = 7, +pub enum Averaging { + #[doc(alias = "num-1")] + Num1 = 0, + #[doc(alias = "num-4")] + Num4 = 1, + #[doc(alias = "num-16")] + Num16 = 2, + #[doc(alias = "num-64")] + Num64 = 3, + #[doc(alias = "num-128")] + Num128 = 4, + #[doc(alias = "num-256")] + Num256 = 5, + #[doc(alias = "num-512")] + Num512 = 6, + #[doc(alias = "num-1024")] + Num1024 = 7, } -impl core::convert::TryFrom for AlertFunction { +impl core::convert::TryFrom for Averaging { type Error = ::device_driver::ConversionError; fn try_from(val: u8) -> Result { match val { - 0 => Ok(Self::None), - 1 => Ok(Self::ShuntOverLimit), - 2 => Ok(Self::ShuntUnderLimit), - 3 => Ok(Self::BusOverLimit), - 4 => Ok(Self::BusUnderLimit), - 5 => Ok(Self::PowerOverLimit), - 6 => Ok(Self::Reserved6), - 7 => Ok(Self::Reserved7), + 0 => Ok(Self::Num1), + 1 => Ok(Self::Num4), + 2 => Ok(Self::Num16), + 3 => Ok(Self::Num64), + 4 => Ok(Self::Num128), + 5 => Ok(Self::Num256), + 6 => Ok(Self::Num512), + 7 => Ok(Self::Num1024), val => Err(::device_driver::ConversionError { source: val, - target: "AlertFunction", + target: "Averaging", }), } } } -impl From for u8 { - fn from(val: AlertFunction) -> Self { +impl From for u8 { + fn from(val: Averaging) -> Self { match val { - AlertFunction::None => 0, - AlertFunction::ShuntOverLimit => 1, - AlertFunction::ShuntUnderLimit => 2, - AlertFunction::BusOverLimit => 3, - AlertFunction::BusUnderLimit => 4, - AlertFunction::PowerOverLimit => 5, - AlertFunction::Reserved6 => 6, - AlertFunction::Reserved7 => 7, + Averaging::Num1 => 0, + Averaging::Num4 => 1, + Averaging::Num16 => 2, + Averaging::Num64 => 3, + Averaging::Num128 => 4, + Averaging::Num256 => 5, + Averaging::Num512 => 6, + Averaging::Num1024 => 7, } } } +#[doc(hidden)] +impl ::device_driver::EnumIndex for Averaging { + #[track_caller] + fn index(&self) -> i32 { + let index = u8::from(*self); + index.try_into().unwrap() + } +} diff --git a/src/lib.rs b/src/lib.rs index 41f563c..197d4ac 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -12,6 +12,7 @@ #![cfg_attr(not(test), no_std)] #![allow(async_fn_in_trait)] +use device_driver::FieldsetMetadata; use embedded_sensors_hal_async::sensor; #[allow(clippy::all)] @@ -62,15 +63,17 @@ pub struct DeviceInterface { pub address: u8, } -impl device_driver::AsyncRegisterInterface for DeviceInterface { +impl device_driver::RegisterInterfaceBase for DeviceInterface { type Error = Ina4230Error; type AddressType = u8; +} +impl device_driver::AsyncRegisterInterface for DeviceInterface { async fn write_register( &mut self, address: Self::AddressType, - _size_bits: u32, - data: &[u8], + data: &mut [u8], + _meta_data: &FieldsetMetadata, ) -> Result<(), Self::Error> { debug_assert!(data.len() <= LARGEST_REG_SIZE_BYTES, "Register data too large"); let mut buf = [0u8; 1 + LARGEST_REG_SIZE_BYTES]; @@ -85,8 +88,8 @@ impl device_driver::AsyncRegisterInterface fo async fn read_register( &mut self, address: Self::AddressType, - _size_bits: u32, data: &mut [u8], + _meta_data: &FieldsetMetadata, ) -> Result<(), Self::Error> { self.i2c .write_read(self.address, &[address], data) @@ -281,7 +284,7 @@ impl Ina4230 { /// Release the underlying I²C bus. pub fn release(self) -> I2c { - self.device.interface.i2c + self.device.free().i2c } // ── Device management ───────────────────────────────────────────────── @@ -320,7 +323,7 @@ impl Ina4230 { /// # Errors /// /// Returns [`Ina4230Error::Bus`] if an I²C bus error occurs. - pub async fn flags(&mut self) -> Result> { + pub async fn flags(&mut self) -> Result> { self.device.flags().read_async().await } @@ -576,6 +579,7 @@ impl EnergySensor for Ina4230 { #[cfg(test)] mod tests { + use device_driver::Block; use embedded_hal_mock::eh1::i2c::{Mock, Transaction}; use super::*; @@ -595,7 +599,7 @@ mod tests { }); let id = dev.manufacturer_id().read_async().await.unwrap(); assert_eq!(id.id(), 0x5449); - dev.interface.i2c.done(); + dev.interface().i2c.done(); } #[tokio::test] @@ -617,7 +621,7 @@ mod tests { .write_async(|w| w.set_shunt_cal(cal)) .await .unwrap(); - dev.interface.i2c.done(); + dev.interface().i2c.done(); } #[tokio::test] diff --git a/supply-chain/config.toml b/supply-chain/config.toml index 582523d..0f4471a 100644 --- a/supply-chain/config.toml +++ b/supply-chain/config.toml @@ -19,34 +19,6 @@ url = "https://raw.githubusercontent.com/mozilla/supply-chain/main/audits.toml" [imports.zcash] url = "https://raw.githubusercontent.com/zcash/rust-ecosystem/main/supply-chain/audits.toml" -[[exemptions.embedded-hal-mock]] -version = "0.11.1" -criteria = "safe-to-run" - -[[exemptions.embedded-sensors-hal]] -version = "0.1.1" -criteria = "safe-to-deploy" - [[exemptions.embedded-sensors-hal-async]] version = "0.4.0" criteria = "safe-to-deploy" - -[[exemptions.embedded-time]] -version = "0.12.1" -criteria = "safe-to-run" - -[[exemptions.num]] -version = "0.3.1" -criteria = "safe-to-run" - -[[exemptions.num-complex]] -version = "0.3.1" -criteria = "safe-to-run" - -[[exemptions.num-rational]] -version = "0.3.2" -criteria = "safe-to-run" - -[[exemptions.paste]] -version = "1.0.15" -criteria = "safe-to-deploy" diff --git a/supply-chain/imports.lock b/supply-chain/imports.lock index b9a6c15..b483094 100644 --- a/supply-chain/imports.lock +++ b/supply-chain/imports.lock @@ -14,8 +14,8 @@ user-id = 55123 user-login = "rust-lang-owner" [[publisher.device-driver]] -version = "1.0.8" -when = "2026-03-06" +version = "2.1.0" +when = "2026-08-24" user-id = 85562 user-login = "diondokter" user-name = "Dion Dokter" @@ -88,18 +88,25 @@ user-id = 3618 user-login = "dtolnay" user-name = "David Tolnay" +[[audits.OpenDevicePartnership.audits.defmt]] +who = "Felipe Balbi " +criteria = "safe-to-deploy" +version = "1.0.1" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/mcxa-pac/refs/heads/main/supply-chain/audits.toml" + [[audits.OpenDevicePartnership.audits.defmt]] who = "Jerry Xie " criteria = "safe-to-deploy" -version = "0.3.100" -notes = "Compatibility shim: no_std crate that re-exports defmt 1.x items for 0.3 API compatibility. No unsafe code, no build script, no powerful imports, no logic - pure pub-use re-exports. Assisted-by: copilot-cli:claude-opus-4.6 cargo-vet" +delta = "1.0.1 -> 1.1.0" +notes = "Delta audit: No new unsafe code. build.rs adds xtensa-esp32s2-none-elf to no_cas list. New Format impls for core::fmt::Error and Wrapping are safe. Assisted-by: GitHub Copilot:claude-opus-4.6" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" [[audits.OpenDevicePartnership.audits.defmt]] -who = "Felipe Balbi " +who = "Jerry Xie " criteria = "safe-to-deploy" -version = "1.0.1" -aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/mcxa-pac/refs/heads/main/supply-chain/audits.toml" +delta = "1.1.0 -> 1.1.1" +notes = "Reviewed version/dependency metadata and UI diagnostic updates. Runtime implementation is unchanged; defmt-macros is pinned from 1.1.0 to separately audited 1.1.1. No unsafe or ambient capability changes." +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq25723/refs/heads/main/supply-chain/audits.toml" [[audits.OpenDevicePartnership.audits.defmt-macros]] who = "Felipe Balbi " @@ -107,6 +114,20 @@ criteria = "safe-to-deploy" version = "1.0.1" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/mcxa-pac/refs/heads/main/supply-chain/audits.toml" +[[audits.OpenDevicePartnership.audits.defmt-macros]] +who = "Jerry Xie " +criteria = "safe-to-deploy" +delta = "1.0.1 -> 1.1.0" +notes = "Delta: adds transparent/bound derive attrs. No unsafe. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq40z50/refs/heads/main/supply-chain/audits.toml" + +[[audits.OpenDevicePartnership.audits.defmt-macros]] +who = "Jerry Xie " +criteria = "safe-to-deploy" +delta = "1.1.0 -> 1.1.1" +notes = "Replaced proc-macro-error2 diagnostic handling with syn::Error across proc-macro parsing and error paths. Reviewed generated-code paths and dependency changes; no unsafe code or new filesystem, network, environment, or process capabilities were introduced." +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq25723/refs/heads/main/supply-chain/audits.toml" + [[audits.OpenDevicePartnership.audits.defmt-parser]] who = "Felipe Balbi " criteria = "safe-to-deploy" @@ -123,54 +144,112 @@ aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/mcxa- who = "Jerry Xie " criteria = "safe-to-deploy" delta = "0.2.7 -> 1.0.0" -notes = "Pure no_std trait crate. Complete API redesign for 1.0: removed nb-based traits, CAN module, all unsafe code. Only defines traits/enums/types for digital, I2C, SPI, PWM, delay. No build script, no proc macros, no powerful imports. Assisted-by: copilot-cli:claude-opus-4.6 cargo-vet" +notes = "Pure no_std trait crate. Complete API redesign for 1.0: removed nb-based traits, CAN module, all unsafe code. Only defines traits/enums/types for digital, I2C, SPI, PWM, delay. No build script, no proc macros, no powerful imports. Assisted-by: copilot-cli:claude-opus-4.6" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" [[audits.OpenDevicePartnership.audits.embedded-hal-async]] who = "Jerry Xie " criteria = "safe-to-deploy" version = "1.0.0" -notes = "no_std async HAL trait definitions. No unsafe in library. Build script only runs rustc --version. Assisted-by: copilot-cli:claude-opus-4.6 cargo-vet" +notes = "no_std async HAL trait definitions. No unsafe in library. Build script only runs rustc --version. Assisted-by: copilot-cli:claude-opus-4.6" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" +[[audits.OpenDevicePartnership.audits.embedded-hal-mock]] +who = "Jerry Xie " +criteria = "safe-to-run" +delta = "0.8.0 -> 0.11.1" +notes = "Delta: adds embedded-hal 1.x support. No unsafe, no network/fs access. Test mock infrastructure. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq25773/refs/heads/main/supply-chain/audits.toml" + [[audits.OpenDevicePartnership.audits.embedded-hal-nb]] who = "Jerry Xie " criteria = "safe-to-deploy" version = "1.0.0" -notes = "no_std trait-only crate. No unsafe, no build script, no proc macros, no powerful imports. Assisted-by: copilot-cli:claude-opus-4.6 cargo-vet" +notes = "no_std trait-only crate. No unsafe, no build script, no proc macros, no powerful imports. Assisted-by: copilot-cli:claude-opus-4.6" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" +[[audits.OpenDevicePartnership.audits.embedded-io]] +who = "Jerry Xie " +criteria = "safe-to-deploy" +delta = "0.6.1 -> 0.7.1" +notes = "Add core::error::Error trait bound (MSRV 1.81). defmt 0.3->1.0. Implement ReadReady/WriteReady for slices and VecDeque. Add seek_relative(). Fix method forwardings. Trusted publisher (Dirbaio from Embedded WG)." +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embassy-imxrt/refs/heads/main/supply-chain/audits.toml" + [[audits.OpenDevicePartnership.audits.embedded-io-async]] who = "Jerry Xie " criteria = "safe-to-deploy" version = "0.6.1" -notes = "No unsafe. Build script only detects nightly via rustc --version. Pure async trait definitions for embedded I/O. Assisted-by: copilot-cli:claude-opus-4.6 cargo-vet" +notes = "No unsafe. Build script only detects nightly via rustc --version. Pure async trait definitions for embedded I/O. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" + +[[audits.OpenDevicePartnership.audits.embedded-io-async]] +who = "Jerry Xie " +criteria = "safe-to-deploy" +delta = "0.6.1 -> 0.7.0" +notes = "Delta 0.6.1->0.7.0: No unsafe. Build script removed (AFIT now stable). flush() made required, BufRead requires Read, new VecDeque impls. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" + +[[audits.OpenDevicePartnership.audits.embedded-sensors-hal]] +who = "Kurtis Dinelle " +criteria = "safe-to-deploy" +version = "0.1.0" +notes = "ODP crates are always trusted." +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" + +[[audits.OpenDevicePartnership.audits.embedded-sensors-hal]] +who = "Jerry Xie " +criteria = "safe-to-deploy" +delta = "0.1.0 -> 0.1.1" +notes = "Delta audit: #![forbid(unsafe_code)] and #![no_std] remain enforced. No build script (build=false). Changes: defmt dep bumped 0.3.7->1.0.0, added paste dep for identifier concatenation, added assert_approx_eq dev-dep. New decl_threshold_traits! declarative macro generates blocking ThresholdSet/Hysteresis traits (and async ThresholdWait variant). Temperature and humidity modules invoke the macro and add comprehensive tests. Doc example fixes (crate name, struct typo). Typo fixes in ErrorKind Display impl. No unsafe code, no proc macros, no filesystem/network/process access. Assisted-by: GitHub Copilot:claude-opus-4.6" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" +[[audits.OpenDevicePartnership.audits.embedded-time]] +who = "Jerry Xie " +criteria = "safe-to-run" +version = "0.12.1" +notes = "Full audit: no_std embedded time library. deny(unsafe_code). No build script, no ambient capabilities. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq25773/refs/heads/main/supply-chain/audits.toml" + [[audits.OpenDevicePartnership.audits.gimli]] who = "Robert Zieba " criteria = "safe-to-run" version = "0.31.1" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" +[[audits.OpenDevicePartnership.audits.num]] +who = "Jerry Xie " +criteria = "safe-to-run" +delta = "0.4.0 -> 0.3.1" +notes = "Downgrade delta: version and dep changes only. no_std meta-crate. No unsafe, no build script. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq25773/refs/heads/main/supply-chain/audits.toml" + +[[audits.OpenDevicePartnership.audits.num-complex]] +who = "Jerry Xie " +criteria = "safe-to-run" +delta = "0.4.2 -> 0.3.1" +notes = "Downgrade delta: removes ComplexFloat trait, bytemuck support. Strict feature subset, no unsafe. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq25773/refs/heads/main/supply-chain/audits.toml" + [[audits.OpenDevicePartnership.audits.num-iter]] who = "Jerry Xie " criteria = "safe-to-deploy" delta = "0.1.43 -> 0.1.45" -notes = "Delta audit: edition upgrade to 2018, MSRV 1.31, build.rs removed, i128 now unconditional, DoubleEndedIterator uses Integer::dec(). No unsafe, no powerful imports, no_std only. Assisted-by: copilot-cli:claude-opus-4.6 cargo-vet" +notes = "Delta audit: edition upgrade to 2018, MSRV 1.31, build.rs removed, i128 now unconditional, DoubleEndedIterator uses Integer::dec(). No unsafe, no powerful imports, no_std only. Assisted-by: copilot-cli:claude-opus-4.6" aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embedded-services/refs/heads/main/supply-chain/audits.toml" -[[audits.OpenDevicePartnership.audits.proc-macro-error-attr2]] -who = "Felipe Balbi " -criteria = "safe-to-deploy" -version = "2.0.0" -aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/mcxa-pac/refs/heads/main/supply-chain/audits.toml" +[[audits.OpenDevicePartnership.audits.num-rational]] +who = "Jerry Xie " +criteria = "safe-to-run" +delta = "0.4.1 -> 0.3.2" +notes = "Downgrade delta: removes Default impl, ldexp helper. Pure math, no unsafe. Assisted-by: copilot-cli:claude-opus-4.6" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/bq25773/refs/heads/main/supply-chain/audits.toml" -[[audits.OpenDevicePartnership.audits.proc-macro-error2]] -who = "Felipe Balbi " +[[audits.OpenDevicePartnership.audits.paste]] +who = "Jerry Xie " criteria = "safe-to-deploy" -version = "2.0.1" -aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/mcxa-pac/refs/heads/main/supply-chain/audits.toml" +version = "1.0.15" +notes = "Proc-macro crate for identifier pasting. No unsafe code. Build script only detects rustc version. std::env::var used only for env!() segment feature. All generated code is safe identifiers/literals via proc_macro API. Assisted-by: GitHub Copilot:claude-opus-4.6 cargo-vet" +aggregated-from = "https://raw.githubusercontent.com/OpenDevicePartnership/embassy-npcx/refs/heads/main/supply-chain/audits.toml" [[audits.OpenDevicePartnership.audits.tokio]] who = "Robert Zieba " @@ -329,6 +408,12 @@ Additional review comments can be found at https://crrev.com/c/4723145/31 """ aggregated-from = "https://chromium.googlesource.com/chromium/src/+/main/third_party/rust/chromium_crates_io/supply-chain/audits.toml?format=TEXT" +[[audits.google.audits.embedded-hal-mock]] +who = "George Burgess IV " +criteria = "safe-to-run" +version = "0.8.0" +aggregated-from = "https://chromium.googlesource.com/chromiumos/third_party/rust_crates/+/refs/heads/main/cargo-vet/audits.toml?format=TEXT" + [[audits.google.audits.nb]] who = "George Burgess IV " criteria = "safe-to-deploy" @@ -386,6 +471,27 @@ criteria = "safe-to-deploy" version = "1.0.2" aggregated-from = "https://chromium.googlesource.com/chromiumos/third_party/rust_crates/+/refs/heads/main/cargo-vet/audits.toml?format=TEXT" +[[audits.mozilla.audits.num]] +who = "Josh Stone " +criteria = "safe-to-deploy" +version = "0.4.0" +notes = "All code written or reviewed by Josh Stone." +aggregated-from = "https://hg.mozilla.org/mozilla-central/raw-file/tip/supply-chain/audits.toml" + +[[audits.mozilla.audits.num-complex]] +who = "Josh Stone " +criteria = "safe-to-deploy" +version = "0.4.2" +notes = "All code written or reviewed by Josh Stone." +aggregated-from = "https://hg.mozilla.org/mozilla-central/raw-file/tip/supply-chain/audits.toml" + +[[audits.mozilla.audits.num-rational]] +who = "Josh Stone " +criteria = "safe-to-deploy" +version = "0.4.1" +notes = "All code written or reviewed by Josh Stone." +aggregated-from = "https://hg.mozilla.org/mozilla-central/raw-file/tip/supply-chain/audits.toml" + [[audits.mozilla.audits.pin-project-lite]] who = "Mike Hommey " criteria = "safe-to-deploy"